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| author | Huacai Chen | 2014-02-16 09:01:18 +0100 |
|---|---|---|
| committer | Ralf Baechle | 2014-03-31 18:17:12 +0200 |
| commit | 26859198195503823735641ff79a246299606da8 (patch) | |
| tree | f7781b35177ee32bf098437f684d3b0904acb168 /arch/mips/mti-malta | |
| parent | MIPS: No need to select ARCH_SUPPORTS_MSI (diff) | |
| download | kernel-qcow2-linux-26859198195503823735641ff79a246299606da8.tar.gz kernel-qcow2-linux-26859198195503823735641ff79a246299606da8.tar.xz kernel-qcow2-linux-26859198195503823735641ff79a246299606da8.zip | |
MIPS: Loongson: Rename PRID_IMP_LOONGSON1 and PRID_IMP_LOONGSON2
Loongson-1 is a 32-bit MIPS CPU and Loongson-2/3 are 64-bit MIPS CPUs,
and both Loongson-2/3 has the same PRID IMP filed (0x6300). As a
result, renaming PRID_IMP_LOONGSON1 and PRID_IMP_LOONGSON2 to
PRID_IMP_LOONGSON_32 and PRID_IMP_LOONGSON_64 will make more sense.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Tested-by: Alex Smith <alex.smith@imgtec.com>
Reviewed-by: Alex Smith <alex.smith@imgtec.com>
Cc: John Crispin <john@phrozen.org>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/6552/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mti-malta')
0 files changed, 0 insertions, 0 deletions