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| author | Paul Burton | 2016-10-05 19:18:14 +0200 |
|---|---|---|
| committer | Ralf Baechle | 2016-10-06 18:01:28 +0200 |
| commit | f23020230e682a43cc4706cabb041bba469df2d6 (patch) | |
| tree | 50a67f63a49b3e63273848c936173de59cb05149 /arch/mips/pci/pci-alchemy.c | |
| parent | MIPS: PCI: Support generic drivers (diff) | |
| download | kernel-qcow2-linux-f23020230e682a43cc4706cabb041bba469df2d6.tar.gz kernel-qcow2-linux-f23020230e682a43cc4706cabb041bba469df2d6.tar.xz kernel-qcow2-linux-f23020230e682a43cc4706cabb041bba469df2d6.zip | |
MIPS: Sanitise coherentio semantics
The coherentio variable has previously been used as a boolean value,
indicating whether the user specified that coherent I/O should be
enabled or disabled. It failed to take into account the case where the
user does not specify any preference, in which case it makes sense that
we should default to coherent I/O if the hardware supports it
(hw_coherentio is non-zero).
Introduce an enum to clarify the 3 different values of coherentio & use
it throughout the code, modifying plat_device_is_coherent() &
r4k_cache_init() to take into account the default case.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Paul Burton <paul.burton@imgtec.com>
Patchwork: https://patchwork.linux-mips.org/patch/14347/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pci/pci-alchemy.c')
| -rw-r--r-- | arch/mips/pci/pci-alchemy.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/mips/pci/pci-alchemy.c b/arch/mips/pci/pci-alchemy.c index c8994c156e2d..e99ca7702d8a 100644 --- a/arch/mips/pci/pci-alchemy.c +++ b/arch/mips/pci/pci-alchemy.c @@ -429,7 +429,8 @@ static int alchemy_pci_probe(struct platform_device *pdev) /* Au1500 revisions older than AD have borked coherent PCI */ if ((alchemy_get_cputype() == ALCHEMY_CPU_AU1500) && - (read_c0_prid() < 0x01030202) && !coherentio) { + (read_c0_prid() < 0x01030202) && + (coherentio == IO_COHERENCE_DISABLED)) { val = __raw_readl(ctx->regs + PCI_REG_CONFIG); val |= PCI_CONFIG_NC; __raw_writel(val, ctx->regs + PCI_REG_CONFIG); |