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| author | Tony Wu | 2013-06-20 14:32:30 +0200 |
|---|---|---|
| committer | Ralf Baechle | 2013-06-21 18:07:03 +0200 |
| commit | dfb033f09e2a98a89b7a09f7e913f0b791dd01e1 (patch) | |
| tree | fff879c9372e00c36d5e911eb1da63196e66ae80 /arch/mips/sibyte | |
| parent | MIPS: Fix TLBR-use hazards for R2 cores in the TLB reload handlers (diff) | |
| download | kernel-qcow2-linux-dfb033f09e2a98a89b7a09f7e913f0b791dd01e1.tar.gz kernel-qcow2-linux-dfb033f09e2a98a89b7a09f7e913f0b791dd01e1.tar.xz kernel-qcow2-linux-dfb033f09e2a98a89b7a09f7e913f0b791dd01e1.zip | |
MIPS: microMIPS: Fix POOL16C minor opcode enum
As pointed out by Maciej, POOL16C minor opcodes were mostly shifted
by one bit. Correct those opcodes, and also add jraddiusp to the enum.
Signed-off-by: Tony Wu <tung7970@gmail.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Acked-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: david.daney@cavium.com
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5527/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/sibyte')
0 files changed, 0 insertions, 0 deletions