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| author | Jayachandran C | 2011-08-23 10:05:30 +0200 |
|---|---|---|
| committer | Ralf Baechle | 2011-12-07 23:04:54 +0100 |
| commit | 11d48aace2e47617eeb1fe8a4a073e40e6d480aa (patch) | |
| tree | d56fb96238b34b5ebbef77e15f2a9c168da77b02 /arch/mips | |
| parent | MIPS: Netlogic: Change load address (diff) | |
| download | kernel-qcow2-linux-11d48aace2e47617eeb1fe8a4a073e40e6d480aa.tar.gz kernel-qcow2-linux-11d48aace2e47617eeb1fe8a4a073e40e6d480aa.tar.xz kernel-qcow2-linux-11d48aace2e47617eeb1fe8a4a073e40e6d480aa.zip | |
MIPS: Netlogic: add r4k_wait as the cpu_wait
Use r4k_wait as the CPU wait function for XLR/XLS processors.
Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2728/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/kernel/cpu-probe.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index c7d3cf1ce46e..aa20382b9305 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -191,6 +191,7 @@ void __init check_wait(void) case CPU_CAVIUM_OCTEON_PLUS: case CPU_CAVIUM_OCTEON2: case CPU_JZRISC: + case CPU_XLR: cpu_wait = r4k_wait; break; |