diff options
| author | Paul Burton | 2014-03-03 13:08:40 +0100 |
|---|---|---|
| committer | Paul Burton | 2014-05-28 17:20:14 +0200 |
| commit | e2a9e5ad719fb424ab3c30520733aa0e8fbcf1ce (patch) | |
| tree | fdf4723703809f156461e58305a66817339c10c9 /arch/mips | |
| parent | MIPS: CPC: provide locking functions (diff) | |
| download | kernel-qcow2-linux-e2a9e5ad719fb424ab3c30520733aa0e8fbcf1ce.tar.gz kernel-qcow2-linux-e2a9e5ad719fb424ab3c30520733aa0e8fbcf1ce.tar.xz kernel-qcow2-linux-e2a9e5ad719fb424ab3c30520733aa0e8fbcf1ce.zip | |
MIPS: add kmap_noncoherent to wire a cached non-coherent TLB entry
This is identical to kmap_coherent apart from the cache coherency
attribute used for the TLB entry, so kmap_coherent is abstracted to
kmap_prot which is then called for both kmap_coherent &
kmap_noncoherent. This will be used by a subsequent patch.
Suggested-by: Leonid Yegoshin <leonid.yegoshin@imgtec.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/include/asm/cacheflush.h | 6 | ||||
| -rw-r--r-- | arch/mips/include/asm/pgtable.h | 2 | ||||
| -rw-r--r-- | arch/mips/mm/init.c | 14 |
3 files changed, 20 insertions, 2 deletions
diff --git a/arch/mips/include/asm/cacheflush.h b/arch/mips/include/asm/cacheflush.h index 69468ded2828..e08381a37f8b 100644 --- a/arch/mips/include/asm/cacheflush.h +++ b/arch/mips/include/asm/cacheflush.h @@ -113,6 +113,12 @@ unsigned long run_uncached(void *func); extern void *kmap_coherent(struct page *page, unsigned long addr); extern void kunmap_coherent(void); +extern void *kmap_noncoherent(struct page *page, unsigned long addr); + +static inline void kunmap_noncoherent(void) +{ + kunmap_coherent(); +} #define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE static inline void flush_kernel_dcache_page(struct page *page) diff --git a/arch/mips/include/asm/pgtable.h b/arch/mips/include/asm/pgtable.h index 008324d1c261..539ddd148bbb 100644 --- a/arch/mips/include/asm/pgtable.h +++ b/arch/mips/include/asm/pgtable.h @@ -32,6 +32,8 @@ struct vm_area_struct; _page_cachable_default) #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \ _PAGE_GLOBAL | _page_cachable_default) +#define PAGE_KERNEL_NC __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \ + _PAGE_GLOBAL | _CACHE_CACHABLE_NONCOHERENT) #define PAGE_USERIO __pgprot(_PAGE_PRESENT | (cpu_has_rixi ? 0 : _PAGE_READ) | _PAGE_WRITE | \ _page_cachable_default) #define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \ diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c index 4fc74c78265a..80ff52e27b7f 100644 --- a/arch/mips/mm/init.c +++ b/arch/mips/mm/init.c @@ -114,7 +114,7 @@ static void __init kmap_coherent_init(void) static inline void kmap_coherent_init(void) {} #endif -void *kmap_coherent(struct page *page, unsigned long addr) +static void *__kmap_pgprot(struct page *page, unsigned long addr, pgprot_t prot) { enum fixed_addresses idx; unsigned long vaddr, flags, entrylo; @@ -133,7 +133,7 @@ void *kmap_coherent(struct page *page, unsigned long addr) idx += in_interrupt() ? FIX_N_COLOURS : 0; #endif vaddr = __fix_to_virt(FIX_CMAP_END - idx); - pte = mk_pte(page, PAGE_KERNEL); + pte = mk_pte(page, prot); #if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) entrylo = pte.pte_high; #else @@ -171,6 +171,16 @@ void *kmap_coherent(struct page *page, unsigned long addr) return (void*) vaddr; } +void *kmap_coherent(struct page *page, unsigned long addr) +{ + return __kmap_pgprot(page, addr, PAGE_KERNEL); +} + +void *kmap_noncoherent(struct page *page, unsigned long addr) +{ + return __kmap_pgprot(page, addr, PAGE_KERNEL_NC); +} + void kunmap_coherent(void) { #ifndef CONFIG_MIPS_MT_SMTC |