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| author | Keerthy | 2017-11-10 12:26:52 +0100 |
|---|---|---|
| committer | Tony Lindgren | 2017-11-28 16:03:26 +0100 |
| commit | b6d6af7226465b6d11eac09d0be2ab78a4a9eb62 (patch) | |
| tree | 6896c3dac8d8ac7152a63c0a2b9a5f123d4652d2 /arch/nios2/configs | |
| parent | ARM: OMAP2+: Fix SRAM virt to phys translation for save_secure_ram_context (diff) | |
| download | kernel-qcow2-linux-b6d6af7226465b6d11eac09d0be2ab78a4a9eb62.tar.gz kernel-qcow2-linux-b6d6af7226465b6d11eac09d0be2ab78a4a9eb62.tar.xz kernel-qcow2-linux-b6d6af7226465b6d11eac09d0be2ab78a4a9eb62.zip | |
ARM: AM33xx: PRM: Remove am33xx_pwrdm_read_prev_pwrst function
Referring TRM Am335X series:
http://www.ti.com/lit/ug/spruh73p/spruh73p.pdf
The LastPowerStateEntered bitfield is present only for PM_CEFUSE
domain. This is not present in any of the other power domains. Hence
remove the generic am33xx_pwrdm_read_prev_pwrst hook which wrongly
reads the reserved bit fields for all the other power domains.
Reading the reserved bits leads to wrongly interpreting the low
power transitions for various power domains that do not have the
LastPowerStateEntered field. The pm debug counters values are wrong
currently as we are incrementing them based on the reserved bits.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/nios2/configs')
0 files changed, 0 insertions, 0 deletions