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authorDavid Gibson2007-05-08 06:10:01 +0200
committerPaul Mackerras2007-05-08 06:47:32 +0200
commitf6dfc80554b27da11dbb36ebae166b23ec3aa9ca (patch)
tree2ca363b4e2d634988c40c9a03106c719b0324ebd /arch/powerpc/boot/44x.c
parent[POWERPC] Add device tree for Ebony (diff)
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[POWERPC] Support for the Ebony 440GP reference board in arch/powerpc
This adds platform support code for the Ebony (440GP) evaluation board. This includes both code in arch/powerpc/platforms/44x for board initialization, and zImage wrapper code to correctly tweak the flattened device tree based on information from the firmware. The zImage supports both IBM OpenBIOS (aka "treeboot") and old versions of uboot which don't support a flattened device tree. Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/boot/44x.c')
-rw-r--r--arch/powerpc/boot/44x.c40
1 files changed, 40 insertions, 0 deletions
diff --git a/arch/powerpc/boot/44x.c b/arch/powerpc/boot/44x.c
new file mode 100644
index 000000000000..d51377d9024f
--- /dev/null
+++ b/arch/powerpc/boot/44x.c
@@ -0,0 +1,40 @@
+/*
+ * Copyright 2007 David Gibson, IBM Corporation.
+ *
+ * Based on earlier code:
+ * Matt Porter <mporter@kernel.crashing.org>
+ * Copyright 2002-2005 MontaVista Software Inc.
+ *
+ * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
+ * Copyright (c) 2003, 2004 Zultys Technologies
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <stddef.h>
+#include "types.h"
+#include "string.h"
+#include "stdio.h"
+#include "ops.h"
+#include "reg.h"
+#include "dcr.h"
+
+/* Read the 44x memory controller to get size of system memory. */
+void ibm44x_fixup_memsize(void)
+{
+ int i;
+ unsigned long memsize, bank_config;
+
+ memsize = 0;
+ for (i = 0; i < ARRAY_SIZE(sdram_bxcr); i++) {
+ mtdcr(DCRN_SDRAM0_CFGADDR, sdram_bxcr[i]);
+ bank_config = mfdcr(DCRN_SDRAM0_CFGDATA);
+
+ if (bank_config & SDRAM_CONFIG_BANK_ENABLE)
+ memsize += SDRAM_CONFIG_BANK_SIZE(bank_config);
+ }
+
+ dt_fixup_memory(0, memsize);
+}