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| author | Yangbo Lu | 2015-07-29 09:12:38 +0200 |
|---|---|---|
| committer | Scott Wood | 2015-10-17 01:45:11 +0200 |
| commit | 07e9117e43fc5a25787379be011e36d0980f3135 (patch) | |
| tree | f838eec846a5ca0d3d668dd4dc2d0fd19580e7ea /arch/powerpc/boot/dts/fsl/mpc8572si-post.dtsi | |
| parent | powerpc/corenet: use the mixed mode of MPIC when enabling CPU hotplug (diff) | |
| download | kernel-qcow2-linux-07e9117e43fc5a25787379be011e36d0980f3135.tar.gz kernel-qcow2-linux-07e9117e43fc5a25787379be011e36d0980f3135.tar.xz kernel-qcow2-linux-07e9117e43fc5a25787379be011e36d0980f3135.zip | |
powerpc/dts: Add and fix 1588 timer node for eTSEC
Add 1588 timer node in files:
arch/powerpc/boot/dts/bsc9131rdb.dtsi
arch/powerpc/boot/dts/bsc9132qds.dtsi
arch/powerpc/boot/dts/p1010rdb.dtsi
arch/powerpc/boot/dts/p1020rdb-pd.dts
arch/powerpc/boot/dts/p1021rdb-pc.dtsi
arch/powerpc/boot/dts/p1022ds.dtsi
arch/powerpc/boot/dts/p1025twr.dtsi
For P2020RDB-PC, registers' values should be calculated
based on default 1588 reference clock(300MHz) not 250MHz,
and fix this in file:
arch/powerpc/boot/dts/p2020rdb-pc.dtsi
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'arch/powerpc/boot/dts/fsl/mpc8572si-post.dtsi')
0 files changed, 0 insertions, 0 deletions