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| author | Dave Kleikamp | 2010-03-05 11:43:12 +0100 |
|---|---|---|
| committer | Josh Boyer | 2010-05-05 15:11:10 +0200 |
| commit | e7f75ad01d590243904c2d95ab47e6b2e9ef6dad (patch) | |
| tree | 454cf065417973e9c2fcd75542351c2534b9a4b9 /arch/powerpc/include/asm/cache.h | |
| parent | powerpc/44x: break out cpu init code into stand-alone function (diff) | |
| download | kernel-qcow2-linux-e7f75ad01d590243904c2d95ab47e6b2e9ef6dad.tar.gz kernel-qcow2-linux-e7f75ad01d590243904c2d95ab47e6b2e9ef6dad.tar.xz kernel-qcow2-linux-e7f75ad01d590243904c2d95ab47e6b2e9ef6dad.zip | |
powerpc/47x: Base ppc476 support
This patch adds the base support for the 476 processor. The code was
primarily written by Ben Herrenschmidt and Torez Smith, but I've been
maintaining it for a while.
The goal is to have a single binary that will run on 44x and 47x, but
we still have some details to work out. The biggest is that the L1 cache
line size differs on the two platforms, but it's currently a compile-time
option.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Torez Smith <lnxtorez@linux.vnet.ibm.com>
Signed-off-by: Dave Kleikamp <shaggy@linux.vnet.ibm.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Diffstat (limited to 'arch/powerpc/include/asm/cache.h')
| -rw-r--r-- | arch/powerpc/include/asm/cache.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h index 81de6eb3455d..725634fc18c6 100644 --- a/arch/powerpc/include/asm/cache.h +++ b/arch/powerpc/include/asm/cache.h @@ -12,8 +12,12 @@ #define L1_CACHE_SHIFT 6 #define MAX_COPY_PREFETCH 4 #elif defined(CONFIG_PPC32) -#define L1_CACHE_SHIFT 5 #define MAX_COPY_PREFETCH 4 +#if defined(CONFIG_PPC_47x) +#define L1_CACHE_SHIFT 7 +#else +#define L1_CACHE_SHIFT 5 +#endif #else /* CONFIG_PPC64 */ #define L1_CACHE_SHIFT 7 #endif |