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| author | LEROY Christophe | 2015-01-20 10:57:34 +0100 |
|---|---|---|
| committer | Scott Wood | 2015-01-30 04:59:02 +0100 |
| commit | ce67f5d0a00cce231e62334c3624737623c32d6a (patch) | |
| tree | c723a98f0acfe0e685727ff602f901ea70ce984e /arch/powerpc/include | |
| parent | powerpc/8xx: remove tests on PGDIR entry validity (diff) | |
| download | kernel-qcow2-linux-ce67f5d0a00cce231e62334c3624737623c32d6a.tar.gz kernel-qcow2-linux-ce67f5d0a00cce231e62334c3624737623c32d6a.tar.xz kernel-qcow2-linux-ce67f5d0a00cce231e62334c3624737623c32d6a.zip | |
powerpc32: Use kmem_cache memory for PGDIR
When pages are not 4K, PGDIR table is allocated with kmalloc(). In order to
optimise TLB handlers, aligned memory is needed. kmalloc() doesn't provide
aligned memory blocks, so lets use a kmem_cache pool instead.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'arch/powerpc/include')
| -rw-r--r-- | arch/powerpc/include/asm/pgtable-ppc32.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/pgtable-ppc32.h b/arch/powerpc/include/asm/pgtable-ppc32.h index 9cde3c1522e3..26ce0ab0a9e4 100644 --- a/arch/powerpc/include/asm/pgtable-ppc32.h +++ b/arch/powerpc/include/asm/pgtable-ppc32.h @@ -347,10 +347,14 @@ static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry) #define pte_to_pgoff(pte) (pte_val(pte) >> 3) #define pgoff_to_pte(off) ((pte_t) { ((off) << 3) | _PAGE_FILE }) +#ifndef CONFIG_PPC_4K_PAGES +void pgtable_cache_init(void); +#else /* * No page table caches to initialise */ #define pgtable_cache_init() do { } while (0) +#endif extern int get_pteptr(struct mm_struct *mm, unsigned long addr, pte_t **ptep, pmd_t **pmdp); |