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| author | Mihai Caraman | 2013-08-08 14:56:09 +0200 |
|---|---|---|
| committer | Scott Wood | 2014-01-08 01:15:29 +0100 |
| commit | 228b1a473037c89d524e03a569c688a22241b4ea (patch) | |
| tree | 89148336fa415353ad442861ab17d4beda3f8973 /arch/powerpc/kernel/cpu_setup_fsl_booke.S | |
| parent | Merge branch 'merge' into next (diff) | |
| download | kernel-qcow2-linux-228b1a473037c89d524e03a569c688a22241b4ea.tar.gz kernel-qcow2-linux-228b1a473037c89d524e03a569c688a22241b4ea.tar.xz kernel-qcow2-linux-228b1a473037c89d524e03a569c688a22241b4ea.zip | |
powerpc/booke64: Add LRAT error exception handler
LRAT (Logical to Real Address Translation) present in MMU v2 provides hardware
translation from a logical page number (LPN) to a real page number (RPN) when
tlbwe is executed by a guest or when a page table translation occurs from a
guest virtual address.
Add LRAT error exception handler to Booke3E 64-bit kernel and the basic KVM
handler to avoid build breakage. This is a prerequisite for KVM LRAT support
that will follow.
Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'arch/powerpc/kernel/cpu_setup_fsl_booke.S')
| -rw-r--r-- | arch/powerpc/kernel/cpu_setup_fsl_booke.S | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S index bfb18c7290b7..fa6862db8a02 100644 --- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S +++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S @@ -57,6 +57,12 @@ _GLOBAL(__setup_cpu_e6500) mflr r6 #ifdef CONFIG_PPC64 bl .setup_altivec_ivors + /* Touch IVOR42 only if the CPU supports E.HV category */ + mfspr r10,SPRN_MMUCFG + rlwinm. r10,r10,0,MMUCFG_LPIDSIZE + beq 1f + bl .setup_lrat_ivor +1: #endif bl __setup_cpu_e5500 mtlr r6 @@ -119,6 +125,12 @@ _GLOBAL(__setup_cpu_e5500) _GLOBAL(__restore_cpu_e6500) mflr r5 bl .setup_altivec_ivors + /* Touch IVOR42 only if the CPU supports E.HV category */ + mfspr r10,SPRN_MMUCFG + rlwinm. r10,r10,0,MMUCFG_LPIDSIZE + beq 1f + bl .setup_lrat_ivor +1: bl __restore_cpu_e5500 mtlr r5 blr |