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| author | Nicholas Piggin | 2016-10-13 05:43:52 +0200 |
|---|---|---|
| committer | Michael Ellerman | 2016-11-14 01:11:51 +0100 |
| commit | f4329f2ecb149282fdfdd8830a936a56b1497a05 (patch) | |
| tree | 437623c6fe2f44a63a62e754fb423b84bd62967a /arch/powerpc/kernel/exceptions-64s.S | |
| parent | powerpc: Remove suspect CONFIG_PPC_BOOK3E #ifdefs in nohash/64/pgtable.h (diff) | |
| download | kernel-qcow2-linux-f4329f2ecb149282fdfdd8830a936a56b1497a05.tar.gz kernel-qcow2-linux-f4329f2ecb149282fdfdd8830a936a56b1497a05.tar.xz kernel-qcow2-linux-f4329f2ecb149282fdfdd8830a936a56b1497a05.zip | |
powerpc/64s: Reduce exception alignment
Exception handlers are aligned to 128 bytes (L1 cache) on 64s, which is
overkill. It can reduce the icache footprint of any individual exception
path. However taken as a whole, the expansion in icache footprint seems
likely to be counter-productive and cause more total misses.
Create IFETCH_ALIGN_SHIFT/BYTES, which should give optimal ifetch
alignment with much more reasonable alignment. This saves 1792 bytes
from head_64.o text with an allmodconfig build.
Other subarchitectures should define appropriate IFETCH_ALIGN_SHIFT
values if this becomes more widely used.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/kernel/exceptions-64s.S')
| -rw-r--r-- | arch/powerpc/kernel/exceptions-64s.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S index 08ba447a4b3d..50f0c5ab7e02 100644 --- a/arch/powerpc/kernel/exceptions-64s.S +++ b/arch/powerpc/kernel/exceptions-64s.S @@ -1403,7 +1403,7 @@ USE_TEXT_SECTION() /* * Hash table stuff */ - .align 7 + .balign IFETCH_ALIGN_BYTES do_hash_page: #ifdef CONFIG_PPC_STD_MMU_64 andis. r0,r4,0xa410 /* weird error? */ |