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| author | Christophe Leroy | 2016-05-17 09:02:56 +0200 |
|---|---|---|
| committer | Scott Wood | 2016-07-09 09:02:48 +0200 |
| commit | 62f64b49d04dc70687cd713c804fecd80216b2d6 (patch) | |
| tree | f4d8264d6e3a40c95cb2aecf404642e097cc9852 /arch/powerpc/mm/8xx_mmu.c | |
| parent | powerpc/8xx: Rework CONFIG_PIN_TLB handling (diff) | |
| download | kernel-qcow2-linux-62f64b49d04dc70687cd713c804fecd80216b2d6.tar.gz kernel-qcow2-linux-62f64b49d04dc70687cd713c804fecd80216b2d6.tar.xz kernel-qcow2-linux-62f64b49d04dc70687cd713c804fecd80216b2d6.zip | |
powerpc/8xx: add CONFIG_PIN_TLB_IMMR
CONFIG_PIN_TLB maps IMMR area and the first 24 Mbytes of memory.
In some circunstances it might be more interesting to not map
IMMR but map 32 Mbytes of memory instead.
Therefore we add config option CONFIG_PIN_TLB_IMMR to select if
IMMR shall be pinned or not, hence whether we pin 24 or 32 Mbytes of RAM
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Scott Wood <oss@buserror.net>
Diffstat (limited to 'arch/powerpc/mm/8xx_mmu.c')
| -rw-r--r-- | arch/powerpc/mm/8xx_mmu.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/arch/powerpc/mm/8xx_mmu.c b/arch/powerpc/mm/8xx_mmu.c index 0f0a83ed7a20..6c5025e81236 100644 --- a/arch/powerpc/mm/8xx_mmu.c +++ b/arch/powerpc/mm/8xx_mmu.c @@ -61,11 +61,15 @@ void __init MMU_init_hw(void) #ifdef CONFIG_PIN_TLB unsigned long ctr = mfspr(SPRN_MD_CTR) & 0xfe000000; unsigned long flags = 0xf0 | MD_SPS16K | _PAGE_SHARED | _PAGE_DIRTY; - int i; +#ifdef CONFIG_PIN_TLB_IMMR + int i = 29; +#else + int i = 28; +#endif unsigned long addr = 0; unsigned long mem = total_lowmem; - for (i = 29; i < 32 && mem >= LARGE_PAGE_SIZE_8M; i++) { + for (; i < 32 && mem >= LARGE_PAGE_SIZE_8M; i++) { mtspr(SPRN_MD_CTR, ctr | (i << 8)); mtspr(SPRN_MD_EPN, (unsigned long)__va(addr) | MD_EVALID); mtspr(SPRN_MD_TWC, MD_PS8MEG | MD_SVALID); @@ -88,7 +92,7 @@ static void mmu_mapin_immr(void) } /* Address of instructions to patch */ -#ifndef CONFIG_PIN_TLB +#ifndef CONFIG_PIN_TLB_IMMR extern unsigned int DTLBMiss_jmp; #endif extern unsigned int DTLBMiss_cmp, FixupDAR_cmp; @@ -109,7 +113,7 @@ unsigned long __init mmu_mapin_ram(unsigned long top) if (__map_without_ltlbs) { mapped = 0; mmu_mapin_immr(); -#ifndef CONFIG_PIN_TLB +#ifndef CONFIG_PIN_TLB_IMMR patch_instruction(&DTLBMiss_jmp, PPC_INST_NOP); #endif } else { |