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| author | Aneesh Kumar K.V | 2016-04-29 15:25:38 +0200 |
|---|---|---|
| committer | Michael Ellerman | 2016-05-01 10:32:33 +0200 |
| commit | 30bda41aba4efb2370c97e2cbe7385de93ccc372 (patch) | |
| tree | 3584b20bb4e895469fb2dc0ca6309402928d1d63 /arch/powerpc/mm/hash64_64k.c | |
| parent | powerpc/mm: Use a helper for finding pte bits mapping I/O area (diff) | |
| download | kernel-qcow2-linux-30bda41aba4efb2370c97e2cbe7385de93ccc372.tar.gz kernel-qcow2-linux-30bda41aba4efb2370c97e2cbe7385de93ccc372.tar.xz kernel-qcow2-linux-30bda41aba4efb2370c97e2cbe7385de93ccc372.zip | |
powerpc/mm: Drop WIMG in favour of new constants
PowerISA 3.0 introduces two pte bits with the below meaning for radix:
00 -> Normal Memory
01 -> Strong Access Order (SAO)
10 -> Non idempotent I/O (Cache inhibited and guarded)
11 -> Tolerant I/O (Cache inhibited)
We drop the existing WIMG bits in the Linux page table in favour of the
above constants. We loose _PAGE_WRITETHRU with this conversion. We only
use writethru via pgprot_cached_wthru() which is used by
fbdev/controlfb.c which is Apple control display and also PPC32.
With respect to _PAGE_COHERENCE, we have been marking hpte always
coherent for some time now. htab_convert_pte_flags() always added
HPTE_R_M.
NOTE: KVM changes need closer review.
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/mm/hash64_64k.c')
| -rw-r--r-- | arch/powerpc/mm/hash64_64k.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/mm/hash64_64k.c b/arch/powerpc/mm/hash64_64k.c index e7782862362b..675331083728 100644 --- a/arch/powerpc/mm/hash64_64k.c +++ b/arch/powerpc/mm/hash64_64k.c @@ -244,7 +244,7 @@ int __hash_page_64K(unsigned long ea, unsigned long access, * If so, bail out and refault as a 4k page */ if (!mmu_has_feature(MMU_FTR_CI_LARGE_PAGE) && - unlikely(old_pte & _PAGE_NO_CACHE)) + unlikely(pte_ci(pte))) return 0; /* * Try to lock the PTE, add ACCESSED and DIRTY if it was |