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| author | Aneesh Kumar K.V | 2016-11-17 11:16:23 +0100 |
|---|---|---|
| committer | Michael Ellerman | 2016-11-18 13:16:58 +0100 |
| commit | cac4a185405d4415eca269cae976438b44a37ae0 (patch) | |
| tree | 95feff05d40607ca8e0f556e1eef09fb095d0438 /arch/powerpc/mm/hash_utils_64.c | |
| parent | powerpc/mm/radix: Invalidate ERAT on tlbiel for POWER9 DD1 (diff) | |
| download | kernel-qcow2-linux-cac4a185405d4415eca269cae976438b44a37ae0.tar.gz kernel-qcow2-linux-cac4a185405d4415eca269cae976438b44a37ae0.tar.xz kernel-qcow2-linux-cac4a185405d4415eca269cae976438b44a37ae0.zip | |
powerpc/mm: Fix missing update of HID register on secondary CPUs
We need to update on secondaries for the selected MMU mode.
Fixes: ad410674f560 ("powerpc/mm: Update the HID bit when switching from radix to hash")
Reported-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/mm/hash_utils_64.c')
| -rw-r--r-- | arch/powerpc/mm/hash_utils_64.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c index 44d3c3a38e3e..5503078090cd 100644 --- a/arch/powerpc/mm/hash_utils_64.c +++ b/arch/powerpc/mm/hash_utils_64.c @@ -1029,6 +1029,10 @@ void hash__early_init_mmu_secondary(void) { /* Initialize hash table for that CPU */ if (!firmware_has_feature(FW_FEATURE_LPAR)) { + + if (cpu_has_feature(CPU_FTR_POWER9_DD1)) + update_hid_for_hash(); + if (!cpu_has_feature(CPU_FTR_ARCH_300)) mtspr(SPRN_SDR1, _SDR1); else |