diff options
| author | David Gibson | 2009-10-26 20:24:31 +0100 |
|---|---|---|
| committer | Benjamin Herrenschmidt | 2009-10-30 07:20:57 +0100 |
| commit | f71dc176aa06359681c30ba6877ffccab6fba3a6 (patch) | |
| tree | b72d97c2db323ab94399cd2633108c0a00a5da31 /arch/powerpc/mm/tlb_hash64.c | |
| parent | powerpc: Add kdump support to Collaborative Memory Manager (diff) | |
| download | kernel-qcow2-linux-f71dc176aa06359681c30ba6877ffccab6fba3a6.tar.gz kernel-qcow2-linux-f71dc176aa06359681c30ba6877ffccab6fba3a6.tar.xz kernel-qcow2-linux-f71dc176aa06359681c30ba6877ffccab6fba3a6.zip | |
powerpc/mm: Make hpte_need_flush() correctly mask for multiple page sizes
Currently, hpte_need_flush() only correctly flushes the given address
for normal pages. Callers for hugepages are required to mask the
address themselves.
But hpte_need_flush() already looks up the page sizes for its own
reasons, so this is a rather silly imposition on the callers. This
patch alters it to mask based on the pagesize it has looked up itself,
and removes the awkward masking code in the hugepage caller.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/mm/tlb_hash64.c')
| -rw-r--r-- | arch/powerpc/mm/tlb_hash64.c | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/arch/powerpc/mm/tlb_hash64.c b/arch/powerpc/mm/tlb_hash64.c index 2b2f35f6985e..282d9306361f 100644 --- a/arch/powerpc/mm/tlb_hash64.c +++ b/arch/powerpc/mm/tlb_hash64.c @@ -53,11 +53,6 @@ void hpte_need_flush(struct mm_struct *mm, unsigned long addr, i = batch->index; - /* We mask the address for the base page size. Huge pages will - * have applied their own masking already - */ - addr &= PAGE_MASK; - /* Get page size (maybe move back to caller). * * NOTE: when using special 64K mappings in 4K environment like @@ -75,6 +70,9 @@ void hpte_need_flush(struct mm_struct *mm, unsigned long addr, } else psize = pte_pagesize_index(mm, addr, pte); + /* Mask the address for the correct page size */ + addr &= ~((1UL << mmu_psize_defs[psize].shift) - 1); + /* Build full vaddr */ if (!is_kernel_addr(addr)) { ssize = user_segment_size(addr); |