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authorChristophe Leroy2019-06-14 08:41:41 +0200
committerMichael Ellerman2019-07-04 18:06:37 +0200
commit372fba9c76af11f1c7d162d22cff94e46f467bfb (patch)
tree9cd696130982bef15be7c4eb9e791c5354c75d84 /arch/powerpc/platforms
parentpowerpc/8xx: compact microcode arrays (diff)
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powerpc/8xx: refactor writing of CPM microcode arrays
Create a function to refactor the writing of CPM microcode arrays. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/platforms')
-rw-r--r--arch/powerpc/platforms/8xx/micropatch.c35
1 files changed, 13 insertions, 22 deletions
diff --git a/arch/powerpc/platforms/8xx/micropatch.c b/arch/powerpc/platforms/8xx/micropatch.c
index a080a7d569a5..04ef0b48ab21 100644
--- a/arch/powerpc/platforms/8xx/micropatch.c
+++ b/arch/powerpc/platforms/8xx/micropatch.c
@@ -204,9 +204,15 @@ static uint patch_2f00[] __initdata = {
};
#endif
+static void __init cpm_write_patch(cpm8xx_t *cp, int offset, uint *patch, int len)
+{
+ if (!len)
+ return;
+ memcpy_toio(cp->cp_dpmem + offset, patch, len);
+}
+
void __init cpm_load_patch(cpm8xx_t *cp)
{
- volatile uint *dp; /* Dual-ported RAM. */
volatile cpm8xx_t *commproc;
#if defined(CONFIG_I2C_SPI_UCODE_PATCH) || \
defined(CONFIG_I2C_SPI_SMC1_UCODE_PATCH)
@@ -216,20 +222,13 @@ void __init cpm_load_patch(cpm8xx_t *cp)
volatile smc_uart_t *smp;
#endif
#endif
- int i;
-
commproc = cp;
#ifdef CONFIG_USB_SOF_UCODE_PATCH
commproc->cp_rccr = 0;
- dp = (uint *)(commproc->cp_dpmem);
- for (i=0; i<(sizeof(patch_2000)/4); i++)
- *dp++ = patch_2000[i];
-
- dp = (uint *)&(commproc->cp_dpmem[0x0f00]);
- for (i=0; i<(sizeof(patch_2f00)/4); i++)
- *dp++ = patch_2f00[i];
+ cpm_write_patch(cp, 0, patch_2000, sizeof(patch_2000));
+ cpm_write_patch(cp, 0xf00, patch_2f00, sizeof(patch_2f00));
commproc->cp_rccr = 0x0009;
@@ -241,13 +240,8 @@ void __init cpm_load_patch(cpm8xx_t *cp)
commproc->cp_rccr = 0;
- dp = (uint *)(commproc->cp_dpmem);
- for (i=0; i<(sizeof(patch_2000)/4); i++)
- *dp++ = patch_2000[i];
-
- dp = (uint *)&(commproc->cp_dpmem[0x0f00]);
- for (i=0; i<(sizeof(patch_2f00)/4); i++)
- *dp++ = patch_2f00[i];
+ cpm_write_patch(cp, 0, patch_2000, sizeof(patch_2000));
+ cpm_write_patch(cp, 0xf00, patch_2f00, sizeof(patch_2f00));
iip = (iic_t *)&commproc->cp_dparam[PROFF_IIC];
# define RPBASE 0x0500
@@ -255,9 +249,8 @@ void __init cpm_load_patch(cpm8xx_t *cp)
/* Put SPI above the IIC, also 32-byte aligned.
*/
- i = (RPBASE + sizeof(iic_t) + 31) & ~31;
spp = (struct spi_pram *)&commproc->cp_dparam[PROFF_SPI];
- spp->rpbase = i;
+ spp->rpbase = (RPBASE + sizeof(iic_t) + 31) & ~31;
# if defined(CONFIG_I2C_SPI_UCODE_PATCH)
commproc->cp_cpmcr1 = 0x802a;
@@ -271,9 +264,7 @@ void __init cpm_load_patch(cpm8xx_t *cp)
# if defined(CONFIG_I2C_SPI_SMC1_UCODE_PATCH)
- dp = (uint *)&(commproc->cp_dpmem[0x0e00]);
- for (i=0; i<(sizeof(patch_2e00)/4); i++)
- *dp++ = patch_2e00[i];
+ cpm_write_patch(cp, 0xe00, patch_2e00, sizeof(patch_2e00));
commproc->cp_cpmcr1 = 0x8080;
commproc->cp_cpmcr2 = 0x808a;