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authorKumar Gala2011-02-15 05:45:48 +0100
committerKumar Gala2011-03-15 15:29:56 +0100
commitdecbb280bb8e3bceebcf5defb4f61dfbfdb23e18 (patch)
tree47d845745196b4a0c76b0206316f3092b3c8da92 /arch/powerpc/sysdev/fsl_pci.h
parentpowerpc/pseries: Disable MSI using new interface if possible (diff)
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powerpc/85xx: Fix writing to spin table 'cpu-release-addr' on ppc64e
If the spin table is located in the linear mapping (which can happen if we have 4G or more of memory) we need to access the spin table via a cacheable coherent mapping like we do on ppc32 (and do explicit cache flush). See the following commit for the ppc32 version of this issue: commit d1d47ec6e62ab08d2ebb925fd9203abfad3adfbf Author: Peter Tyser <ptyser@xes-inc.com> Date: Fri Dec 18 16:50:37 2009 -0600 powerpc/85xx: Fix SMP when "cpu-release-addr" is in lowmem Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/sysdev/fsl_pci.h')
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