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| author | Palmer Dabbelt | 2018-08-27 23:42:53 +0200 |
|---|---|---|
| committer | Palmer Dabbelt | 2018-10-23 02:38:00 +0200 |
| commit | 86e581e310785782e2025a076dc9a3f5138e5bf3 (patch) | |
| tree | fd97fa14f75e9defd4488733bef5aa5bb4d8481a /arch/riscv/include/uapi/asm/elf.h | |
| parent | RISC-V: Don't set cacheinfo.{physical_line_partition,attributes} (diff) | |
| download | kernel-qcow2-linux-86e581e310785782e2025a076dc9a3f5138e5bf3.tar.gz kernel-qcow2-linux-86e581e310785782e2025a076dc9a3f5138e5bf3.tar.xz kernel-qcow2-linux-86e581e310785782e2025a076dc9a3f5138e5bf3.zip | |
RISC-V: Mask out the F extension on systems without D
The RISC-V Linux port doesn't support systems that have the F extension
but don't have the D extension -- we actually don't support systems
without D either, but Alan's patch set is rectifying that soon. For now
I think we can leave this in a semi-broken state and just wait for
Alan's patch set to get merged for proper non-FPU support -- the patch
set is starting to look good, so doing something in-between doesn't seem
like it's worth the work.
I don't think it's worth fretting about support for systems with F but
not D for now: our glibc ABIs are IMAC and IMAFDC so they probably won't
end up being popular. We can always extend this in the future.
CC: Alan Kao <alankao@andestech.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'arch/riscv/include/uapi/asm/elf.h')
0 files changed, 0 insertions, 0 deletions