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| author | Greg Ungerer | 2012-07-10 05:50:58 +0200 |
|---|---|---|
| committer | Greg Ungerer | 2012-07-17 07:49:40 +0200 |
| commit | d2661c621525956dfdd1e66e1e4fd94b7e4b6ed5 (patch) | |
| tree | 5095f10493de7a3f0bd605b0ca7694a63a2b915e /arch/score | |
| parent | m68k: fix ColdFire clear cache operation (diff) | |
| download | kernel-qcow2-linux-d2661c621525956dfdd1e66e1e4fd94b7e4b6ed5.tar.gz kernel-qcow2-linux-d2661c621525956dfdd1e66e1e4fd94b7e4b6ed5.tar.xz kernel-qcow2-linux-d2661c621525956dfdd1e66e1e4fd94b7e4b6ed5.zip | |
m68k: add support for DMA_BIDIRECTIONAL in dma support functions
The dma cache support functions do not currently support the direction flag
DMA_BIDIRECTIONAL. If a driver passes this direction to dma_map_single or
friends you will get console output like this:
dma_sync_single_for_device: unsupported dir 0
For example when using the Intel e100 ethernet driver on a ColdFire platform
with PCI bus. You will get a stream of these messages coming out.
Modify the dma cache support code adding support for DMA_BIDIRECTIONAL. It is
actioned by doing a cache push operation.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/score')
0 files changed, 0 insertions, 0 deletions