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| author | Allen Pais | 2014-09-08 08:18:53 +0200 |
|---|---|---|
| committer | David S. Miller | 2014-09-10 00:24:10 +0200 |
| commit | cadbb58039f7cab1def9c931012ab04c953a6997 (patch) | |
| tree | d7c4802f418c0f88effde87764bd7d8533ee8998 /arch/sparc/kernel/head_64.S | |
| parent | Merge tag 'microblaze-3.17-rc5' of git://git.monstr.eu/linux-2.6-microblaze (diff) | |
| download | kernel-qcow2-linux-cadbb58039f7cab1def9c931012ab04c953a6997.tar.gz kernel-qcow2-linux-cadbb58039f7cab1def9c931012ab04c953a6997.tar.xz kernel-qcow2-linux-cadbb58039f7cab1def9c931012ab04c953a6997.zip | |
sparc64: correctly recognise M6 and M7 cpu type
The following patch adds support for correctly
recognising M6 and M7 cpu type.
Signed-off-by: Allen Pais <allen.pais@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc/kernel/head_64.S')
| -rw-r--r-- | arch/sparc/kernel/head_64.S | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/sparc/kernel/head_64.S b/arch/sparc/kernel/head_64.S index 452f04fe8da6..4fdeb8040d4d 100644 --- a/arch/sparc/kernel/head_64.S +++ b/arch/sparc/kernel/head_64.S @@ -427,6 +427,12 @@ sun4v_chip_type: cmp %g2, '5' be,pt %xcc, 5f mov SUN4V_CHIP_NIAGARA5, %g4 + cmp %g2, '6' + be,pt %xcc, 5f + mov SUN4V_CHIP_SPARC_M6, %g4 + cmp %g2, '7' + be,pt %xcc, 5f + mov SUN4V_CHIP_SPARC_M7, %g4 ba,pt %xcc, 49f nop @@ -585,6 +591,12 @@ niagara_tlb_fixup: cmp %g1, SUN4V_CHIP_NIAGARA5 be,pt %xcc, niagara4_patch nop + cmp %g1, SUN4V_CHIP_SPARC_M6 + be,pt %xcc, niagara4_patch + nop + cmp %g1, SUN4V_CHIP_SPARC_M7 + be,pt %xcc, niagara4_patch + nop call generic_patch_copyops nop |