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authorDavid S. Miller2006-02-01 03:33:00 +0100
committerDavid S. Miller2006-03-20 10:11:22 +0100
commit4da808c352c290d3f762933d44d4ab90c2fd65f3 (patch)
treeda99326440777580a19c345a5b0d52fbf800042b /arch/sparc64/kernel/winfixup.S
parent[SPARC64]: Fix incorrect TSB lock bit handling. (diff)
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[SPARC64]: Fix bogus flush instruction usage.
Some of the trap code was still assuming that alternate global %g6 was hard coded with current_thread_info(). Let's just consistently flush at KERNBASE when we need a pipeline synchronization. That's locked into the TLB and will always work. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/kernel/winfixup.S')
-rw-r--r--arch/sparc64/kernel/winfixup.S3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/sparc64/kernel/winfixup.S b/arch/sparc64/kernel/winfixup.S
index de588036df43..c0545d089c96 100644
--- a/arch/sparc64/kernel/winfixup.S
+++ b/arch/sparc64/kernel/winfixup.S
@@ -20,7 +20,8 @@ set_pcontext:
ldx [%l1 + %lo(sparc64_kern_pri_context)], %l1
mov PRIMARY_CONTEXT, %g1
stxa %l1, [%g1] ASI_DMMU
- flush %g6
+ sethi %hi(KERNBASE), %l1
+ flush %l1
retl
nop