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| author | Chris Metcalf | 2013-08-15 22:23:24 +0200 |
|---|---|---|
| committer | Chris Metcalf | 2013-09-03 20:53:29 +0200 |
| commit | d7c9661115fd23b4dabb710b3080dd9919dfa891 (patch) | |
| tree | 5eaeb8c4aab296f39d6aa896ec9408419ec17441 /arch/tile/kernel/intvec_64.S | |
| parent | tile: use asm-generic/bitops/builtin-*.h (diff) | |
| download | kernel-qcow2-linux-d7c9661115fd23b4dabb710b3080dd9919dfa891.tar.gz kernel-qcow2-linux-d7c9661115fd23b4dabb710b3080dd9919dfa891.tar.xz kernel-qcow2-linux-d7c9661115fd23b4dabb710b3080dd9919dfa891.zip | |
tile: remove support for TILE64
This chip is no longer being actively developed for (it was superceded
by the TILEPro64 in 2008), and in any case the existing compiler and
toolchain in the community do not support it. It's unlikely that the
kernel works with TILE64 at this point as the configuration has not been
tested in years. The support is also awkward as it requires maintaining
a significant number of ifdefs. So, just remove it altogether.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Diffstat (limited to 'arch/tile/kernel/intvec_64.S')
| -rw-r--r-- | arch/tile/kernel/intvec_64.S | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/tile/kernel/intvec_64.S b/arch/tile/kernel/intvec_64.S index c3a2335fa6a8..ec755d3f3734 100644 --- a/arch/tile/kernel/intvec_64.S +++ b/arch/tile/kernel/intvec_64.S @@ -511,12 +511,10 @@ intvec_\vecname: .else .ifc \c_routine, op_handle_perf_interrupt mfspr r2, PERF_COUNT_STS -#if CHIP_HAS_AUX_PERF_COUNTERS() .else .ifc \c_routine, op_handle_aux_perf_interrupt mfspr r2, AUX_PERF_COUNT_STS .endif -#endif .endif .endif .endif |