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| author | Chris Metcalf | 2011-05-16 20:23:44 +0200 |
|---|---|---|
| committer | Chris Metcalf | 2011-05-20 04:55:59 +0200 |
| commit | 571d76acdab95876aeff869ab6449f826c23aa43 (patch) | |
| tree | b52ceacfa83b1ab4c5a6950007ce8be03cec192e /arch/tile/kernel/single_step.c | |
| parent | arch/tile: use better definitions of xchg() and cmpxchg() (diff) | |
| download | kernel-qcow2-linux-571d76acdab95876aeff869ab6449f826c23aa43.tar.gz kernel-qcow2-linux-571d76acdab95876aeff869ab6449f826c23aa43.tar.xz kernel-qcow2-linux-571d76acdab95876aeff869ab6449f826c23aa43.zip | |
arch/tile: support signal "exception-trace" hook
This change adds support for /proc/sys/debug/exception-trace to tile.
Like x86 and sparc, by default it is set to "1", generating a one-line
printk whenever a user process crashes. By setting it to "2", we get
a much more complete userspace diagnostic at crash time, including
a user-space backtrace, register dump, and memory dump around the
address of the crash.
Some vestiges of the Tilera-internal version of this support are
removed with this patch (the show_crashinfo variable and the
arch_coredump_signal function). We retain a "crashinfo" boot parameter
which allows you to set the boot-time value of exception-trace.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Diffstat (limited to 'arch/tile/kernel/single_step.c')
| -rw-r--r-- | arch/tile/kernel/single_step.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/tile/kernel/single_step.c b/arch/tile/kernel/single_step.c index 86df5a239b70..4032ca8e51b6 100644 --- a/arch/tile/kernel/single_step.c +++ b/arch/tile/kernel/single_step.c @@ -186,6 +186,8 @@ static tile_bundle_bits rewrite_load_store_unaligned( .si_code = SEGV_MAPERR, .si_addr = addr }; + trace_unhandled_signal("segfault", regs, + (unsigned long)addr, SIGSEGV); force_sig_info(info.si_signo, &info, current); return (tile_bundle_bits) 0; } @@ -196,6 +198,8 @@ static tile_bundle_bits rewrite_load_store_unaligned( .si_code = BUS_ADRALN, .si_addr = addr }; + trace_unhandled_signal("unaligned trap", regs, + (unsigned long)addr, SIGBUS); force_sig_info(info.si_signo, &info, current); return (tile_bundle_bits) 0; } |