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| author | Kan Liang | 2016-03-20 09:33:36 +0100 |
|---|---|---|
| committer | Ingo Molnar | 2016-03-31 10:30:34 +0200 |
| commit | e633c65a1d5859da170a83d537d9762c07d12213 (patch) | |
| tree | 73310d311d977f374f23aab743f4a5baa50816d2 /arch/x86/Kconfig.perf | |
| parent | Merge branch 'perf/urgent' into perf/core, to fix up fixes before queueing up... (diff) | |
| download | kernel-qcow2-linux-e633c65a1d5859da170a83d537d9762c07d12213.tar.gz kernel-qcow2-linux-e633c65a1d5859da170a83d537d9762c07d12213.tar.xz kernel-qcow2-linux-e633c65a1d5859da170a83d537d9762c07d12213.zip | |
x86/perf/intel/uncore: Make the Intel uncore PMU driver modular
By default, the uncore driver will be built into the kernel. If it is
configured as a module, the supported CPU model can be auto loaded.
This patch also cleans up the code of uncore_cpu_init() and
uncore_pci_init().
Based-on-a-patch-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Kan Liang <kan.liang@intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Link: http://lkml.kernel.org/r/1458462817-2475-1-git-send-email-kan.liang@intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/Kconfig.perf')
| -rw-r--r-- | arch/x86/Kconfig.perf | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/x86/Kconfig.perf b/arch/x86/Kconfig.perf new file mode 100644 index 000000000000..90b7f5878c96 --- /dev/null +++ b/arch/x86/Kconfig.perf @@ -0,0 +1,11 @@ +menu "Performance monitoring" + +config PERF_EVENTS_INTEL_UNCORE + tristate "Intel uncore performance events" + depends on PERF_EVENTS && CPU_SUP_INTEL && PCI + default y + ---help--- + Include support for Intel uncore performance events. These are + available on NehalemEX and more modern processors. + +endmenu |