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| author | Kirill A. Shutemov | 2018-02-14 12:16:54 +0100 |
|---|---|---|
| committer | Ingo Molnar | 2018-02-14 13:11:15 +0100 |
| commit | 162434e7f58b21f0b6c9cc5fb02222cd7d9064cc (patch) | |
| tree | adf014fd36b800345ea4abfb27961de4b9677f92 /arch/x86/Kconfig | |
| parent | x86/mm: Make PGDIR_SHIFT and PTRS_PER_P4D variable (diff) | |
| download | kernel-qcow2-linux-162434e7f58b21f0b6c9cc5fb02222cd7d9064cc.tar.gz kernel-qcow2-linux-162434e7f58b21f0b6c9cc5fb02222cd7d9064cc.tar.xz kernel-qcow2-linux-162434e7f58b21f0b6c9cc5fb02222cd7d9064cc.zip | |
x86/mm: Make MAX_PHYSADDR_BITS and MAX_PHYSMEM_BITS dynamic
For boot-time switching between paging modes, we need to be able to
adjust size of physical address space at runtime.
As part of making physical address space size variable, we have to make
X86_5LEVEL dependent on SPARSEMEM_VMEMMAP. !SPARSEMEM_VMEMMAP
configuration doesn't build with variable MAX_PHYSMEM_BITS.
For !SPARSEMEM_VMEMMAP SECTIONS_WIDTH depends on MAX_PHYSMEM_BITS:
SECTIONS_WIDTH
SECTIONS_SHIFT
MAX_PHYSMEM_BITS
And SECTIONS_WIDTH is used on pre-processor stage, it doesn't work if it's
dyncamic. See include/linux/page-flags-layout.h.
Effect on kernel image size:
text data bss dec hex filename
8628393 4734340 1368064 14730797 e0c62d vmlinux.before
8628892 4734340 1368064 14731296 e0c820 vmlinux.after
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@suse.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mm@kvack.org
Link: http://lkml.kernel.org/r/20180214111656.88514-8-kirill.shutemov@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/Kconfig')
| -rw-r--r-- | arch/x86/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 92256489b8a4..fcc3f88996b3 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -1431,6 +1431,7 @@ config X86_PAE config X86_5LEVEL bool "Enable 5-level page tables support" select DYNAMIC_MEMORY_LAYOUT + select SPARSEMEM_VMEMMAP depends on X86_64 ---help--- 5-level paging enables access to larger address space: |