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| author | Tony Luck | 2016-02-17 19:20:13 +0100 |
|---|---|---|
| committer | Ingo Molnar | 2016-02-18 09:28:47 +0100 |
| commit | 0f68c088c0adb3c3bbeb487c4ebcde91fd5d34be (patch) | |
| tree | 4aa087d9a71e7f27655d43d0a46555efd856ecf6 /arch/x86/entry/entry_32.S | |
| parent | Merge branch 'x86/urgent' into x86/asm, to pick up fixes (diff) | |
| download | kernel-qcow2-linux-0f68c088c0adb3c3bbeb487c4ebcde91fd5d34be.tar.gz kernel-qcow2-linux-0f68c088c0adb3c3bbeb487c4ebcde91fd5d34be.tar.xz kernel-qcow2-linux-0f68c088c0adb3c3bbeb487c4ebcde91fd5d34be.zip | |
x86/cpufeature: Create a new synthetic cpu capability for machine check recovery
The Intel Software Developer Manual describes bit 24 in the MCG_CAP
MSR:
MCG_SER_P (software error recovery support present) flag,
bit 24 — Indicates (when set) that the processor supports
software error recovery
But only some models with this capability bit set will actually
generate recoverable machine checks.
Check the model name and set a synthetic capability bit. Provide
a command line option to set this bit anyway in case the kernel
doesn't recognise the model name.
Signed-off-by: Tony Luck <tony.luck@intel.com>
Reviewed-by: Borislav Petkov <bp@suse.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/2e5bfb23c89800a036fb8a45fa97a74bb16bc362.1455732970.git.tony.luck@intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/entry/entry_32.S')
0 files changed, 0 insertions, 0 deletions