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authorJoerg Roedel2009-09-03 12:21:31 +0200
committerJoerg Roedel2009-09-03 16:11:08 +0200
commita6b256b41357c33ccb2d105a4457e22bdc83e021 (patch)
treec8567952372218e4cc1a864835ceb3162068fb80 /arch/x86/include/asm/amd_iommu_types.h
parentx86/amd-iommu: Remove old page table handling macros (diff)
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x86/amd-iommu: Support higher level PTEs in iommu_page_unmap
This patch changes fetch_pte and iommu_page_unmap to support different page sizes too. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Diffstat (limited to 'arch/x86/include/asm/amd_iommu_types.h')
-rw-r--r--arch/x86/include/asm/amd_iommu_types.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/include/asm/amd_iommu_types.h b/arch/x86/include/asm/amd_iommu_types.h
index d66430de5f7c..351ca39ece05 100644
--- a/arch/x86/include/asm/amd_iommu_types.h
+++ b/arch/x86/include/asm/amd_iommu_types.h
@@ -158,6 +158,7 @@
#define PM_LEVEL_ENC(x) (((x) << 9) & 0xe00ULL)
#define PM_LEVEL_PDE(x, a) ((a) | PM_LEVEL_ENC((x)) | \
IOMMU_PTE_P | IOMMU_PTE_IR | IOMMU_PTE_IW)
+#define PM_PTE_LEVEL(pte) (((pte) >> 9) & 0x7ULL)
#define IOMMU_PTE_P (1ULL << 0)
#define IOMMU_PTE_TV (1ULL << 1)