diff options
author | Joerg Roedel | 2010-01-15 14:41:15 +0100 |
---|---|---|
committer | Joerg Roedel | 2010-03-07 18:01:11 +0100 |
commit | cbb9d729f3433c9c2660b01dc52e6deb89488886 (patch) | |
tree | e0384945ce9d235d5d3ae4e151728ce3faeb2cdf /arch/x86/include/asm/amd_iommu_types.h | |
parent | kvm: Change kvm_iommu_map_pages to map large pages (diff) | |
download | kernel-qcow2-linux-cbb9d729f3433c9c2660b01dc52e6deb89488886.tar.gz kernel-qcow2-linux-cbb9d729f3433c9c2660b01dc52e6deb89488886.tar.xz kernel-qcow2-linux-cbb9d729f3433c9c2660b01dc52e6deb89488886.zip |
x86/amd-iommu: Make iommu_map_page and alloc_pte aware of page sizes
This patch changes the old map_size parameter of alloc_pte
to a page_size parameter which can be used more easily to
alloc a pte for intermediate page sizes.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Diffstat (limited to 'arch/x86/include/asm/amd_iommu_types.h')
-rw-r--r-- | arch/x86/include/asm/amd_iommu_types.h | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/x86/include/asm/amd_iommu_types.h b/arch/x86/include/asm/amd_iommu_types.h index ba19ad4c47d0..5e8da56755dd 100644 --- a/arch/x86/include/asm/amd_iommu_types.h +++ b/arch/x86/include/asm/amd_iommu_types.h @@ -172,6 +172,34 @@ (~((1ULL << (12 + ((lvl) * 9))) - 1))) #define PM_ALIGNED(lvl, addr) ((PM_MAP_MASK(lvl) & (addr)) == (addr)) +/* + * Returns the page table level to use for a given page size + * Pagesize is expected to be a power-of-two + */ +#define PAGE_SIZE_LEVEL(pagesize) \ + ((__ffs(pagesize) - 12) / 9) +/* + * Returns the number of ptes to use for a given page size + * Pagesize is expected to be a power-of-two + */ +#define PAGE_SIZE_PTE_COUNT(pagesize) \ + (1ULL << ((__ffs(pagesize) - 12) % 9)) + +/* + * Aligns a given io-virtual address to a given page size + * Pagesize is expected to be a power-of-two + */ +#define PAGE_SIZE_ALIGN(address, pagesize) \ + ((address) & ~((pagesize) - 1)) +/* + * Creates an IOMMU PTE for an address an a given pagesize + * The PTE has no permission bits set + * Pagesize is expected to be a power-of-two larger than 4096 + */ +#define PAGE_SIZE_PTE(address, pagesize) \ + (((address) | ((pagesize) - 1)) & \ + (~(pagesize >> 1)) & PM_ADDR_MASK) + #define IOMMU_PTE_P (1ULL << 0) #define IOMMU_PTE_TV (1ULL << 1) #define IOMMU_PTE_U (1ULL << 59) |