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| author | Yazen Ghannam | 2016-11-10 22:10:56 +0100 |
|---|---|---|
| committer | Thomas Gleixner | 2016-11-16 20:46:38 +0100 |
| commit | ddfe43cdc0da3189feac4bb9f0f818bef6d6e56e (patch) | |
| tree | 1f356fa7ee90d0a4eee3e380a1bb031dccb3396c /arch/x86/include/asm/amd_nb.h | |
| parent | x86/amd_nb: Add Fam17h Data Fabric as "Northbridge" (diff) | |
| download | kernel-qcow2-linux-ddfe43cdc0da3189feac4bb9f0f818bef6d6e56e.tar.gz kernel-qcow2-linux-ddfe43cdc0da3189feac4bb9f0f818bef6d6e56e.tar.xz kernel-qcow2-linux-ddfe43cdc0da3189feac4bb9f0f818bef6d6e56e.zip | |
x86/amd_nb: Add SMN and Indirect Data Fabric access for AMD Fam17h
Some devices on Fam17h can only be accessed through the System Management
Network (SMN). The SMN is accessed by a pair of index/data registers in PCI
config space. Add a pair of functions to read from and write to the SMN.
The Data Fabric on Fam17h allows multiple devices to use the same register
space. The registers of a specific device are accessed indirectly using the
device's DF InstanceId. Currently, we only need to read from these devices,
so only define a read function for now.
Signed-off-by: Yazen Ghannam <Yazen.Ghannam@amd.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: x86-ml <x86@kernel.org>
Link: http://lkml.kernel.org/r/1478812257-5424-5-git-send-email-Yazen.Ghannam@amd.com
[ Boris: make __amd_smn_rw() even more compact. ]
Signed-off-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/include/asm/amd_nb.h')
| -rw-r--r-- | arch/x86/include/asm/amd_nb.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/x86/include/asm/amd_nb.h b/arch/x86/include/asm/amd_nb.h index b442ad75b3b3..00c88a01301d 100644 --- a/arch/x86/include/asm/amd_nb.h +++ b/arch/x86/include/asm/amd_nb.h @@ -21,6 +21,10 @@ extern int amd_numa_init(void); extern int amd_get_subcaches(int); extern int amd_set_subcaches(int, unsigned long); +extern int amd_smn_read(u16 node, u32 address, u32 *value); +extern int amd_smn_write(u16 node, u32 address, u32 value); +extern int amd_df_indirect_read(u16 node, u8 func, u16 reg, u8 instance_id, u32 *lo); + struct amd_l3_cache { unsigned indices; u8 subcaches[4]; @@ -55,6 +59,7 @@ struct threshold_bank { }; struct amd_northbridge { + struct pci_dev *root; struct pci_dev *misc; struct pci_dev *link; struct amd_l3_cache l3_cache; |