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author | Tony Luck | 2016-10-29 00:04:41 +0200 |
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committer | Thomas Gleixner | 2016-10-31 02:10:13 +0100 |
commit | 2264d9c74dda1b6835ab7858204073547457dfd0 (patch) | |
tree | bc31a374ccb32b9d55ce91faa4d50644ce4c59cf /arch/x86/include/asm/intel_rdt.h | |
parent | Documentation, x86: Documentation for Intel resource allocation user interface (diff) | |
download | kernel-qcow2-linux-2264d9c74dda1b6835ab7858204073547457dfd0.tar.gz kernel-qcow2-linux-2264d9c74dda1b6835ab7858204073547457dfd0.tar.xz kernel-qcow2-linux-2264d9c74dda1b6835ab7858204073547457dfd0.zip |
x86/intel_rdt: Build structures for each resource based on cache topology
We use the cpu hotplug notifier to catch each cpu in turn and look at
its cache topology w.r.t each of the resource groups. As we discover
new resources, we initialize the bitmask array for each to the default
(full access) value.
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Cc: "Ravi V Shankar" <ravi.v.shankar@intel.com>
Cc: "Shaohua Li" <shli@fb.com>
Cc: "Sai Prakhya" <sai.praneeth.prakhya@intel.com>
Cc: "Peter Zijlstra" <peterz@infradead.org>
Cc: "Stephane Eranian" <eranian@google.com>
Cc: "Dave Hansen" <dave.hansen@intel.com>
Cc: "David Carrillo-Cisneros" <davidcc@google.com>
Cc: "Nilay Vaish" <nilayvaish@gmail.com>
Cc: "Vikas Shivappa" <vikas.shivappa@linux.intel.com>
Cc: "Ingo Molnar" <mingo@elte.hu>
Cc: "Borislav Petkov" <bp@suse.de>
Cc: "H. Peter Anvin" <h.peter.anvin@intel.com>
Link: http://lkml.kernel.org/r/1477692289-37412-3-git-send-email-fenghua.yu@intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/include/asm/intel_rdt.h')
-rw-r--r-- | arch/x86/include/asm/intel_rdt.h | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/arch/x86/include/asm/intel_rdt.h b/arch/x86/include/asm/intel_rdt.h index 9780409d2502..c0d0a6e6448c 100644 --- a/arch/x86/include/asm/intel_rdt.h +++ b/arch/x86/include/asm/intel_rdt.h @@ -39,6 +39,34 @@ struct rdt_resource { int cbm_idx_offset; }; +/** + * struct rdt_domain - group of cpus sharing an RDT resource + * @list: all instances of this resource + * @id: unique id for this instance + * @cpu_mask: which cpus share this resource + * @cbm: array of cache bit masks (indexed by CLOSID) + */ +struct rdt_domain { + struct list_head list; + int id; + struct cpumask cpu_mask; + u32 *cbm; +}; + +/** + * struct msr_param - set a range of MSRs from a domain + * @res: The resource to use + * @low: Beginning index from base MSR + * @high: End index + */ +struct msr_param { + struct rdt_resource *res; + int low; + int high; +}; + +extern struct mutex rdtgroup_mutex; + extern struct rdt_resource rdt_resources_all[]; enum { @@ -56,6 +84,11 @@ enum { r++) \ if (r->capable) +#define for_each_enabled_rdt_resource(r) \ + for (r = rdt_resources_all; r < rdt_resources_all + RDT_NUM_RESOURCES;\ + r++) \ + if (r->enabled) + /* CPUID.(EAX=10H, ECX=ResID=1).EAX */ union cpuid_0x10_1_eax { struct { @@ -71,4 +104,6 @@ union cpuid_0x10_1_edx { } split; unsigned int full; }; + +void rdt_cbm_update(void *arg); #endif /* _ASM_X86_INTEL_RDT_H */ |