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| author | Gustavo A. R. Silva | 2018-02-13 20:22:08 +0100 |
|---|---|---|
| committer | Ingo Molnar | 2018-02-15 01:15:53 +0100 |
| commit | 24dbc6000f4b9b0ef5a9daecb161f1907733765a (patch) | |
| tree | 52877d24a97802248319ff3525ea151510e3f529 /arch/x86/include/asm/processor.h | |
| parent | x86/spectre: Fix an error message (diff) | |
| download | kernel-qcow2-linux-24dbc6000f4b9b0ef5a9daecb161f1907733765a.tar.gz kernel-qcow2-linux-24dbc6000f4b9b0ef5a9daecb161f1907733765a.tar.xz kernel-qcow2-linux-24dbc6000f4b9b0ef5a9daecb161f1907733765a.zip | |
x86/cpu: Change type of x86_cache_size variable to unsigned int
Currently, x86_cache_size is of type int, which makes no sense as we
will never have a valid cache size equal or less than 0. So instead of
initializing this variable to -1, it can perfectly be initialized to 0
and use it as an unsigned variable instead.
Suggested-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Addresses-Coverity-ID: 1464429
Link: http://lkml.kernel.org/r/20180213192208.GA26414@embeddedor.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/include/asm/processor.h')
| -rw-r--r-- | arch/x86/include/asm/processor.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h index b7c8583328c7..44c2c4ec6d60 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -109,7 +109,7 @@ struct cpuinfo_x86 { char x86_vendor_id[16]; char x86_model_id[64]; /* in KB - valid for CPUS which support this call: */ - int x86_cache_size; + unsigned int x86_cache_size; int x86_cache_alignment; /* In bytes */ /* Cache QoS architectural values: */ int x86_cache_max_rmid; /* max index */ |