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| author | Ingo Molnar | 2017-11-07 10:51:10 +0100 |
|---|---|---|
| committer | Ingo Molnar | 2017-11-07 10:51:10 +0100 |
| commit | 141d3b1daacd11bdbd6fa74c2b163093e10d17ee (patch) | |
| tree | 04c98496f16ad2fe34c0cf4f31fedf4fe558c017 /arch/x86/kernel/cpu/microcode/core.c | |
| parent | x86/vector/msi: Select CONFIG_GENERIC_IRQ_RESERVATION_MODE (diff) | |
| parent | Merge branch 'for-4.14-fixes' of git://git.kernel.org/pub/scm/linux/kernel/gi... (diff) | |
| download | kernel-qcow2-linux-141d3b1daacd11bdbd6fa74c2b163093e10d17ee.tar.gz kernel-qcow2-linux-141d3b1daacd11bdbd6fa74c2b163093e10d17ee.tar.xz kernel-qcow2-linux-141d3b1daacd11bdbd6fa74c2b163093e10d17ee.zip | |
Merge branch 'linus' into x86/apic, to resolve conflicts
Conflicts:
arch/x86/include/asm/x2apic.h
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/kernel/cpu/microcode/core.c')
| -rw-r--r-- | arch/x86/kernel/cpu/microcode/core.c | 27 |
1 files changed, 18 insertions, 9 deletions
diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/microcode/core.c index 86e8f0b2537b..c4fa4a85d4cb 100644 --- a/arch/x86/kernel/cpu/microcode/core.c +++ b/arch/x86/kernel/cpu/microcode/core.c @@ -122,9 +122,6 @@ static bool __init check_loader_disabled_bsp(void) bool *res = &dis_ucode_ldr; #endif - if (!have_cpuid_p()) - return *res; - /* * CPUID(1).ECX[31]: reserved for hypervisor use. This is still not * completely accurate as xen pv guests don't see that CPUID bit set but @@ -166,24 +163,36 @@ bool get_builtin_firmware(struct cpio_data *cd, const char *name) void __init load_ucode_bsp(void) { unsigned int cpuid_1_eax; + bool intel = true; - if (check_loader_disabled_bsp()) + if (!have_cpuid_p()) return; cpuid_1_eax = native_cpuid_eax(1); switch (x86_cpuid_vendor()) { case X86_VENDOR_INTEL: - if (x86_family(cpuid_1_eax) >= 6) - load_ucode_intel_bsp(); + if (x86_family(cpuid_1_eax) < 6) + return; break; + case X86_VENDOR_AMD: - if (x86_family(cpuid_1_eax) >= 0x10) - load_ucode_amd_bsp(cpuid_1_eax); + if (x86_family(cpuid_1_eax) < 0x10) + return; + intel = false; break; + default: - break; + return; } + + if (check_loader_disabled_bsp()) + return; + + if (intel) + load_ucode_intel_bsp(); + else + load_ucode_amd_bsp(cpuid_1_eax); } static bool check_loader_disabled_ap(void) |