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| author | Yan, Zheng | 2014-11-05 03:55:58 +0100 |
|---|---|---|
| committer | Ingo Molnar | 2015-02-18 17:16:02 +0100 |
| commit | ba532500c5651a4be4108acc64ed99a95cb005b3 (patch) | |
| tree | 6fe0a328c1b461bea944dd4b1c9aa46fb71b0fd4 /arch/x86/kernel/cpu/perf_event.h | |
| parent | perf/x86/intel: Reduce lbr_sel_map[] size (diff) | |
| download | kernel-qcow2-linux-ba532500c5651a4be4108acc64ed99a95cb005b3.tar.gz kernel-qcow2-linux-ba532500c5651a4be4108acc64ed99a95cb005b3.tar.xz kernel-qcow2-linux-ba532500c5651a4be4108acc64ed99a95cb005b3.zip | |
perf: Introduce pmu context switch callback
The callback is invoked when process is scheduled in or out.
It provides mechanism for later patches to save/store the LBR
stack. For the schedule in case, the callback is invoked at
the same place that flush branch stack callback is invoked.
So it also can replace the flush branch stack callback. To
avoid unnecessary overhead, the callback is enabled only when
there are events use the LBR stack.
Signed-off-by: Yan, Zheng <zheng.z.yan@intel.com>
Signed-off-by: Kan Liang <kan.liang@intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Cc: eranian@google.com
Cc: jolsa@redhat.com
Link: http://lkml.kernel.org/r/1415156173-10035-3-git-send-email-kan.liang@intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/kernel/cpu/perf_event.h')
| -rw-r--r-- | arch/x86/kernel/cpu/perf_event.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/perf_event.h b/arch/x86/kernel/cpu/perf_event.h index 0c45b22495dc..211b54c0c00c 100644 --- a/arch/x86/kernel/cpu/perf_event.h +++ b/arch/x86/kernel/cpu/perf_event.h @@ -473,6 +473,8 @@ struct x86_pmu { void (*check_microcode)(void); void (*flush_branch_stack)(void); + void (*sched_task)(struct perf_event_context *ctx, + bool sched_in); /* * Intel Arch Perfmon v2+ |