diff options
| author | Maciej W. Rozycki | 2008-05-27 22:19:45 +0200 |
|---|---|---|
| committer | Ingo Molnar | 2008-07-08 09:13:06 +0200 |
| commit | 03be750559b2fe20d85dd968e08d5fe1c3accf83 (patch) | |
| tree | 4a8fa76244a20573472c44aa96654c1a79634416 /arch/x86/kernel/io_apic_64.c | |
| parent | x86: I/O APIC: unmask the second-chance timer interrupt (diff) | |
| download | kernel-qcow2-linux-03be750559b2fe20d85dd968e08d5fe1c3accf83.tar.gz kernel-qcow2-linux-03be750559b2fe20d85dd968e08d5fe1c3accf83.tar.xz kernel-qcow2-linux-03be750559b2fe20d85dd968e08d5fe1c3accf83.zip | |
x86: I/O APIC: keep the timer IRQ masked during set-up
Keep the timer interrupt line masked when reconfiguring its interrupt
redirection entry in the I/O APIC.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/io_apic_64.c')
| -rw-r--r-- | arch/x86/kernel/io_apic_64.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/kernel/io_apic_64.c b/arch/x86/kernel/io_apic_64.c index 0e20b7d7c1c7..ae0ac990574f 100644 --- a/arch/x86/kernel/io_apic_64.c +++ b/arch/x86/kernel/io_apic_64.c @@ -911,7 +911,7 @@ static void __init setup_timer_IRQ0_pin(unsigned int apic, unsigned int pin, * to the first CPU. */ entry.dest_mode = INT_DEST_MODE; - entry.mask = 0; /* unmask IRQ now */ + entry.mask = 1; /* mask IRQ now */ entry.dest = cpu_mask_to_apicid(TARGET_CPUS); entry.delivery_mode = INT_DELIVERY_MODE; entry.polarity = 0; |