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| author | Borislav Petkov | 2017-03-26 23:51:24 +0200 |
|---|---|---|
| committer | Radim Krčmář | 2017-04-07 16:49:00 +0200 |
| commit | 74f169090b6f36b867c9df0454366dd9af6f62d1 (patch) | |
| tree | 6dd0f048d0e80397c72dc92ee490e19ba4266fa0 /arch/x86/kvm/svm.c | |
| parent | KVM: nVMX: single function for switching between vmcs (diff) | |
| download | kernel-qcow2-linux-74f169090b6f36b867c9df0454366dd9af6f62d1.tar.gz kernel-qcow2-linux-74f169090b6f36b867c9df0454366dd9af6f62d1.tar.xz kernel-qcow2-linux-74f169090b6f36b867c9df0454366dd9af6f62d1.zip | |
kvm/svm: Setup MCG_CAP on AMD properly
MCG_CAP[63:9] bits are reserved on AMD. However, on an AMD guest, this
MSR returns 0x100010a. More specifically, bit 24 is set, which is simply
wrong. That bit is MCG_SER_P and is present only on Intel. Thus, clean
up the reserved bits in order not to confuse guests.
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Joerg Roedel <joro@8bytes.org>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Radim Krčmář <rkrcmar@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/x86/kvm/svm.c')
| -rw-r--r-- | arch/x86/kvm/svm.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c index 5fba70646c32..1b203abf76e1 100644 --- a/arch/x86/kvm/svm.c +++ b/arch/x86/kvm/svm.c @@ -5256,6 +5256,12 @@ static inline void avic_post_state_restore(struct kvm_vcpu *vcpu) avic_handle_ldr_update(vcpu); } +static void svm_setup_mce(struct kvm_vcpu *vcpu) +{ + /* [63:9] are reserved. */ + vcpu->arch.mcg_cap &= 0x1ff; +} + static struct kvm_x86_ops svm_x86_ops __ro_after_init = { .cpu_has_kvm_support = has_svm, .disabled_by_bios = is_disabled, @@ -5367,6 +5373,7 @@ static struct kvm_x86_ops svm_x86_ops __ro_after_init = { .pmu_ops = &amd_pmu_ops, .deliver_posted_interrupt = svm_deliver_avic_intr, .update_pi_irte = svm_update_pi_irte, + .setup_mce = svm_setup_mce, }; static int __init svm_init(void) |