diff options
| author | Andy Lutomirski | 2017-02-20 17:56:10 +0100 |
|---|---|---|
| committer | Paolo Bonzini | 2017-02-21 11:48:40 +0100 |
| commit | e0c230634af99967da79a6ed1faecc720fb623ca (patch) | |
| tree | 12daed95fe9c1dbb389a2e32917e3ac08b2dea87 /arch/x86/kvm/vmx.c | |
| parent | x86/asm: Define the kernel TSS limit in a macro (diff) | |
| download | kernel-qcow2-linux-e0c230634af99967da79a6ed1faecc720fb623ca.tar.gz kernel-qcow2-linux-e0c230634af99967da79a6ed1faecc720fb623ca.tar.xz kernel-qcow2-linux-e0c230634af99967da79a6ed1faecc720fb623ca.zip | |
x86/kvm/vmx: Don't fetch the TSS base from the GDT
The current CPU's TSS base is a foregone conclusion, so there's no need
to parse it out of the segment tables. This should save a couple cycles
(as STR is surely microcoded and poorly optimized) but, more importantly,
it's a cleanup and it means that segment_base() will never be called on
64-bit kernels.
Cc: Thomas Garnier <thgarnie@google.com>
Cc: Jim Mattson <jmattson@google.com>
Cc: Radim Krčmář <rkrcmar@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/x86/kvm/vmx.c')
| -rw-r--r-- | arch/x86/kvm/vmx.c | 14 |
1 files changed, 4 insertions, 10 deletions
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index d13073c841ff..3dbbf4ec471f 100644 --- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c @@ -2086,13 +2086,6 @@ static unsigned long segment_base(u16 selector) return v; } -static inline unsigned long kvm_read_tr_base(void) -{ - u16 tr; - asm("str %0" : "=g"(tr)); - return segment_base(tr); -} - static void vmx_save_host_state(struct kvm_vcpu *vcpu) { struct vcpu_vmx *vmx = to_vmx(vcpu); @@ -2292,10 +2285,11 @@ static void vmx_vcpu_load(struct kvm_vcpu *vcpu, int cpu) /* * Linux uses per-cpu TSS and GDT, so set these when switching - * processors. + * processors. See 22.2.4. */ - vmcs_writel(HOST_TR_BASE, kvm_read_tr_base()); /* 22.2.4 */ - vmcs_writel(HOST_GDTR_BASE, gdt->address); /* 22.2.4 */ + vmcs_writel(HOST_TR_BASE, + (unsigned long)this_cpu_ptr(&cpu_tss)); + vmcs_writel(HOST_GDTR_BASE, gdt->address); rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp); vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */ |