diff options
| author | Paolo Bonzini | 2019-06-06 14:32:59 +0200 |
|---|---|---|
| committer | Paolo Bonzini | 2019-06-18 11:43:48 +0200 |
| commit | 73f624f47c495d7129abef4b7031ed371cc7abb6 (patch) | |
| tree | d8dc540a7c5cabf21eae8a2134ae9bbf9a8cd583 /arch/x86/kvm/x86.c | |
| parent | kvm: x86: offset is ensure to be in range (diff) | |
| download | kernel-qcow2-linux-73f624f47c495d7129abef4b7031ed371cc7abb6.tar.gz kernel-qcow2-linux-73f624f47c495d7129abef4b7031ed371cc7abb6.tar.xz kernel-qcow2-linux-73f624f47c495d7129abef4b7031ed371cc7abb6.zip | |
KVM: x86: move MSR_IA32_POWER_CTL handling to common code
Make it available to AMD hosts as well, just in case someone is trying
to use an Intel processor's CPUID setup.
Suggested-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/x86/kvm/x86.c')
| -rw-r--r-- | arch/x86/kvm/x86.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index eb87d71ec14a..dcba699e2d46 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -2563,6 +2563,9 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) return 1; vcpu->arch.smbase = data; break; + case MSR_IA32_POWER_CTL: + vcpu->arch.msr_ia32_power_ctl = data; + break; case MSR_IA32_TSC: kvm_write_tsc(vcpu, msr_info); break; @@ -2822,6 +2825,9 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) return 1; msr_info->data = vcpu->arch.arch_capabilities; break; + case MSR_IA32_POWER_CTL: + msr_info->data = vcpu->arch.msr_ia32_power_ctl; + break; case MSR_IA32_TSC: msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + vcpu->arch.tsc_offset; break; |