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| author | Dave Jones | 2008-05-05 23:52:52 +0200 |
|---|---|---|
| committer | Ingo Molnar | 2008-05-12 21:28:13 +0200 |
| commit | 205f93288093df69f9ab5f6981aef27b91088b28 (patch) | |
| tree | 73cf362fcf8cb6fc654c64820ca1efc49fd3d659 /arch/x86 | |
| parent | Linux 2.6.26-rc2 (diff) | |
| download | kernel-qcow2-linux-205f93288093df69f9ab5f6981aef27b91088b28.tar.gz kernel-qcow2-linux-205f93288093df69f9ab5f6981aef27b91088b28.tar.xz kernel-qcow2-linux-205f93288093df69f9ab5f6981aef27b91088b28.zip | |
x86: add new cache descriptor
The latest rev of Intel doc AP-485 details a new cache
descriptor that we don't yet support.
A 6MB 24-way assoc L2 cache.
Signed-off-by: Dave Jones <davej@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86')
| -rw-r--r-- | arch/x86/kernel/cpu/intel_cacheinfo.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c index 26d615dcb149..2c8afafa18e8 100644 --- a/arch/x86/kernel/cpu/intel_cacheinfo.c +++ b/arch/x86/kernel/cpu/intel_cacheinfo.c @@ -62,6 +62,7 @@ static struct _cache_table cache_table[] __cpuinitdata = { 0x4b, LVL_3, 8192 }, /* 16-way set assoc, 64 byte line size */ { 0x4c, LVL_3, 12288 }, /* 12-way set assoc, 64 byte line size */ { 0x4d, LVL_3, 16384 }, /* 16-way set assoc, 64 byte line size */ + { 0x4e, LVL_2, 6144 }, /* 24-way set assoc, 64 byte line size */ { 0x60, LVL_1_DATA, 16 }, /* 8-way set assoc, sectored cache, 64 byte line size */ { 0x66, LVL_1_DATA, 8 }, /* 4-way set assoc, sectored cache, 64 byte line size */ { 0x67, LVL_1_DATA, 16 }, /* 4-way set assoc, sectored cache, 64 byte line size */ |