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| author | Borislav Petkov | 2012-04-16 18:20:36 +0200 |
|---|---|---|
| committer | Borislav Petkov | 2012-04-30 13:22:44 +0200 |
| commit | d26ecc4894464318dce51d709e19dd9d88916bee (patch) | |
| tree | 5ab481b2e9af1eb50be90d39003ad3f5af905b90 /arch/x86 | |
| parent | x86, MCE, AMD: Make APIC LVT thresholding interrupt optional (diff) | |
| download | kernel-qcow2-linux-d26ecc4894464318dce51d709e19dd9d88916bee.tar.gz kernel-qcow2-linux-d26ecc4894464318dce51d709e19dd9d88916bee.tar.xz kernel-qcow2-linux-d26ecc4894464318dce51d709e19dd9d88916bee.zip | |
x86, MCE, AMD: Hide interrupt_enable sysfs node
Depending on whether the box supports the APIC LVT interrupt for
thresholding, we want to show the 'interrupt_enable' sysfs node or not.
Make that the case by adding it to the default sysfs attributes only if
it is supported.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Diffstat (limited to 'arch/x86')
| -rw-r--r-- | arch/x86/kernel/cpu/mcheck/mce_amd.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c index 2c1d178be46e..f4873a64f46d 100644 --- a/arch/x86/kernel/cpu/mcheck/mce_amd.c +++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c @@ -421,10 +421,10 @@ RW_ATTR(threshold_limit); RW_ATTR(error_count); static struct attribute *default_attrs[] = { - &interrupt_enable.attr, &threshold_limit.attr, &error_count.attr, - NULL + NULL, /* possibly interrupt_enable if supported, see below */ + NULL, }; #define to_block(k) container_of(k, struct threshold_block, kobj) @@ -501,6 +501,11 @@ static __cpuinit int allocate_threshold_blocks(unsigned int cpu, b->interrupt_capable = lvt_interrupt_supported(bank, high); b->threshold_limit = THRESHOLD_MAX; + if (b->interrupt_capable) + threshold_ktype.default_attrs[2] = &interrupt_enable.attr; + else + threshold_ktype.default_attrs[2] = NULL; + INIT_LIST_HEAD(&b->miscj); if (per_cpu(threshold_banks, cpu)[bank]->blocks) { |