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authorAndi Kleen2007-07-21 17:10:03 +0200
committerLinus Torvalds2007-07-22 03:37:08 +0200
commit67cddd947992b02f01ad093ec814738c5827d17c (patch)
tree5c10c3a1f645c119e0cc23ecdfc7c3c4dd7eacad /arch/x86_64/kernel/setup.c
parentx86_64: Add vDSO for x86-64 with gettimeofday/clock_gettime/getcpu (diff)
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i386: Add L3 cache support to AMD CPUID4 emulation
With that an L3 cache is correctly reported in the cache information in /sys With fixes from Andreas Herrmann and Dean Gaudet and Joachim Deguara Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/x86_64/kernel/setup.c')
-rw-r--r--arch/x86_64/kernel/setup.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/arch/x86_64/kernel/setup.c b/arch/x86_64/kernel/setup.c
index 675b3d6de10b..6fa0a302e2aa 100644
--- a/arch/x86_64/kernel/setup.c
+++ b/arch/x86_64/kernel/setup.c
@@ -602,8 +602,11 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
if (c->extended_cpuid_level >= 0x80000008)
amd_detect_cmp(c);
- /* Fix cpuid4 emulation for more */
- num_cache_leaves = 3;
+ if (c->extended_cpuid_level >= 0x80000006 &&
+ (cpuid_edx(0x80000006) & 0xf000))
+ num_cache_leaves = 4;
+ else
+ num_cache_leaves = 3;
/* RDTSC can be speculated around */
clear_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);