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authorMax Filippov2015-08-25 17:19:13 +0200
committerChris Zankel2016-03-11 09:53:32 +0100
commitbce299ca54735740a4f2232d23001dea679fbbef (patch)
tree6ec6d5a5b81cbb04ece58efb15a4fe6087aa0423 /arch/xtensa/boot
parentxtensa: xtfpga: fix ethernet controller endianness (diff)
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xtensa: xtfpga: fix i2c controller register width and endianness
I2C controller is attached to XTFPGA boards as native endian device, mark it as such in DTS. Set register width in DTS to 4, this way it works both for little- and big-endian CPUs. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'arch/xtensa/boot')
-rw-r--r--arch/xtensa/boot/dts/xtfpga.dtsi3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/xtensa/boot/dts/xtfpga.dtsi b/arch/xtensa/boot/dts/xtfpga.dtsi
index de133badcdc9..f2120be74331 100644
--- a/arch/xtensa/boot/dts/xtfpga.dtsi
+++ b/arch/xtensa/boot/dts/xtfpga.dtsi
@@ -89,7 +89,8 @@
#size-cells = <0>;
reg = <0x0d090000 0x20>;
reg-shift = <2>;
- reg-io-width = <1>;
+ reg-io-width = <4>;
+ native-endian;
interrupts = <4 1>;
clocks = <&osc>;