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| author | Sascha Hauer | 2014-04-14 16:20:39 +0200 |
|---|---|---|
| committer | Shawn Guo | 2014-04-15 05:13:06 +0200 |
| commit | 17b9b3b9e88ac6564689283a08034faf2c048fdb (patch) | |
| tree | e7e2c008d954724e62e2a91c349244524befbeef /arch | |
| parent | ARM: dts: imx: add required #clock-cells for fixed-clock (diff) | |
| download | kernel-qcow2-linux-17b9b3b9e88ac6564689283a08034faf2c048fdb.tar.gz kernel-qcow2-linux-17b9b3b9e88ac6564689283a08034faf2c048fdb.tar.xz kernel-qcow2-linux-17b9b3b9e88ac6564689283a08034faf2c048fdb.zip | |
ARM: imx6q: clk: Parent DI clocks to video PLL via di_pre_sel
Route the video PLL to the display interface clocks via the di_pre_sel
and di_sel muxes by default.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Tested-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-imx/clk-imx6q.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index 3ed67b592b48..4a6fb65589fa 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c @@ -445,6 +445,15 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) clk_set_parent(clk[ldb_di1_sel], clk[pll5_video_div]); } + clk_set_parent(clk[ipu1_di0_pre_sel], clk[pll5_video_div]); + clk_set_parent(clk[ipu1_di1_pre_sel], clk[pll5_video_div]); + clk_set_parent(clk[ipu2_di0_pre_sel], clk[pll5_video_div]); + clk_set_parent(clk[ipu2_di1_pre_sel], clk[pll5_video_div]); + clk_set_parent(clk[ipu1_di0_sel], clk[ipu1_di0_pre]); + clk_set_parent(clk[ipu1_di1_sel], clk[ipu1_di1_pre]); + clk_set_parent(clk[ipu2_di0_sel], clk[ipu2_di0_pre]); + clk_set_parent(clk[ipu2_di1_sel], clk[ipu2_di1_pre]); + /* * The gpmi needs 100MHz frequency in the EDO/Sync mode, * We can not get the 100MHz from the pll2_pfd0_352m. |