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author | Masahiro Yamada | 2016-10-19 10:23:49 +0200 |
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committer | Masahiro Yamada | 2016-10-22 11:31:42 +0200 |
commit | 19eb4a47224da4bc118f1e304e16b6c08ed172c9 (patch) | |
tree | 9ba1da61a426db3eef22db75c08129ee19aab714 /arch | |
parent | arm64: uniphier: select ARCH_HAS_RESET_CONTROLLER (diff) | |
download | kernel-qcow2-linux-19eb4a47224da4bc118f1e304e16b6c08ed172c9.tar.gz kernel-qcow2-linux-19eb4a47224da4bc118f1e304e16b6c08ed172c9.tar.xz kernel-qcow2-linux-19eb4a47224da4bc118f1e304e16b6c08ed172c9.zip |
reset: uniphier: rename MIO reset to SD reset for Pro5, PXs2, LD20 SoCs
I made a mistake as for naming for this block. The MIO block is not
implemented for these 3 SoCs in the first place. The current naming
will be a trouble if an SoC with both MIO and SD-ctrl blocks appear
in the future.
This driver has just been merged in the previous merge window.
Rename it before the release.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Diffstat (limited to 'arch')
0 files changed, 0 insertions, 0 deletions