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| author | Borislav Petkov | 2009-02-03 16:24:22 +0100 |
|---|---|---|
| committer | H. Peter Anvin | 2009-02-04 03:09:33 +0100 |
| commit | 858770619debfb9269add63e4ba8b7c6b5538dd1 (patch) | |
| tree | c2b5f39ce03ccc9c7481641e3c9b419dd9130c63 /arch | |
| parent | x86: add x86@kernel.org to MAINTAINERS (diff) | |
| download | kernel-qcow2-linux-858770619debfb9269add63e4ba8b7c6b5538dd1.tar.gz kernel-qcow2-linux-858770619debfb9269add63e4ba8b7c6b5538dd1.tar.xz kernel-qcow2-linux-858770619debfb9269add63e4ba8b7c6b5538dd1.zip | |
x86: APIC: enable workaround on AMD Fam10h CPUs
Impact: fix to enable APIC for AMD Fam10h on chipsets with a missing/b0rked
ACPI MP table (MADT)
Booting a 32bit kernel on an AMD Fam10h CPU running on chipsets with
missing/b0rked MP table leads to a hang pretty early in the boot process
due to the APIC not being initialized. Fix that by falling back to the
default APIC base address in 32bit code, as it is done in the 64bit
codepath.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/x86/kernel/apic.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/kernel/apic.c b/arch/x86/kernel/apic.c index 4b6df2469fe3..115449f869ee 100644 --- a/arch/x86/kernel/apic.c +++ b/arch/x86/kernel/apic.c @@ -1436,7 +1436,7 @@ static int __init detect_init_APIC(void) switch (boot_cpu_data.x86_vendor) { case X86_VENDOR_AMD: if ((boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model > 1) || - (boot_cpu_data.x86 == 15)) + (boot_cpu_data.x86 >= 15)) break; goto no_apic; case X86_VENDOR_INTEL: |