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| author | Neil Armstrong | 2019-02-12 17:28:59 +0100 |
|---|---|---|
| committer | Neil Armstrong | 2019-02-13 09:49:32 +0100 |
| commit | 042f01bb7f80012e19369b7f8a52fc5b74f4856b (patch) | |
| tree | 71afaf07b5af2f492ec5f38214dda6b1abb9549a /drivers/clk/meson/g12a-aoclk.h | |
| parent | dt-bindings: clk: add G12A AO Clock and Reset Bindings (diff) | |
| download | kernel-qcow2-linux-042f01bb7f80012e19369b7f8a52fc5b74f4856b.tar.gz kernel-qcow2-linux-042f01bb7f80012e19369b7f8a52fc5b74f4856b.tar.xz kernel-qcow2-linux-042f01bb7f80012e19369b7f8a52fc5b74f4856b.zip | |
clk: meson: Add G12A AO Clock + Reset Controller
Add the Amlogic G12A AO Clock and Reset controller driver handling
generation of Always-On clocks :
- AO Clocks and Reset for Always-On modules
- 32K Generation for USB and CEC
- SAR ADC controller clock
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lkml.kernel.org/r/20190212162859.20743-3-narmstrong@baylibre.com
Diffstat (limited to 'drivers/clk/meson/g12a-aoclk.h')
| -rw-r--r-- | drivers/clk/meson/g12a-aoclk.h | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/drivers/clk/meson/g12a-aoclk.h b/drivers/clk/meson/g12a-aoclk.h new file mode 100644 index 000000000000..04b0d5506641 --- /dev/null +++ b/drivers/clk/meson/g12a-aoclk.h @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +/* + * Copyright (c) 2019 BayLibre, SAS + * Author: Neil Armstrong <narmstrong@baylibre.com> + */ + +#ifndef __G12A_AOCLKC_H +#define __G12A_AOCLKC_H + +/* + * CLKID index values + * + * These indices are entirely contrived and do not map onto the hardware. + * It has now been decided to expose everything by default in the DT header: + * include/dt-bindings/clock/g12a-aoclkc.h. Only the clocks ids we don't want + * to expose, such as the internal muxes and dividers of composite clocks, + * will remain defined here. + */ +#define CLKID_AO_SAR_ADC_SEL 16 +#define CLKID_AO_SAR_ADC_DIV 17 +#define CLKID_AO_CTS_OSCIN 19 +#define CLKID_AO_32K_PRE 20 +#define CLKID_AO_32K_DIV 21 +#define CLKID_AO_32K_SEL 22 +#define CLKID_AO_CEC_PRE 24 +#define CLKID_AO_CEC_DIV 25 +#define CLKID_AO_CEC_SEL 26 + +#define NR_CLKS 29 + +#include <dt-bindings/clock/g12a-aoclkc.h> +#include <dt-bindings/reset/g12a-aoclkc.h> + +#endif /* __G12A_AOCLKC_H */ |