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| author | Stephen Boyd | 2015-03-07 00:41:53 +0100 |
|---|---|---|
| committer | Stephen Boyd | 2015-03-12 20:20:30 +0100 |
| commit | 9d3745d44a7faa7d24db7facb1949a1378162f3e (patch) | |
| tree | d98f818f3c4c2011299f803e8b80aeda2f56c648 /drivers/clk/qcom/clk-rcg.h | |
| parent | Merge tag 'v3.20-exynos5433-clk' of git://linuxtv.org/snawrocki/samsung into ... (diff) | |
| download | kernel-qcow2-linux-9d3745d44a7faa7d24db7facb1949a1378162f3e.tar.gz kernel-qcow2-linux-9d3745d44a7faa7d24db7facb1949a1378162f3e.tar.xz kernel-qcow2-linux-9d3745d44a7faa7d24db7facb1949a1378162f3e.zip | |
clk: qcom: Properly change rates for ahbix clock
The ahbix clock can never be turned off in practice. To change the
rates we need to switch the mux off the M/N counter to an always on
source (XO), reprogram the M/N counter to get the rate we want and
finally switch back to the M/N counter. Add a new ops structure
for this type of clock so that we can set the rate properly.
Fixes: c99e515a92e9 "clk: qcom: Add IPQ806X LPASS clock controller (LCC) driver"
Tested-by: Kenneth Westfield <kwestfie@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/qcom/clk-rcg.h')
| -rw-r--r-- | drivers/clk/qcom/clk-rcg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/qcom/clk-rcg.h b/drivers/clk/qcom/clk-rcg.h index 687e41f91d7c..d09d06ba278e 100644 --- a/drivers/clk/qcom/clk-rcg.h +++ b/drivers/clk/qcom/clk-rcg.h @@ -96,6 +96,7 @@ struct clk_rcg { extern const struct clk_ops clk_rcg_ops; extern const struct clk_ops clk_rcg_bypass_ops; +extern const struct clk_ops clk_rcg_lcc_ops; #define to_clk_rcg(_hw) container_of(to_clk_regmap(_hw), struct clk_rcg, clkr) |