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authorElaine Zhang2016-11-08 10:10:14 +0100
committerHeiko Stuebner2016-11-14 12:20:53 +0100
commita554bb5fb01804a38fde3782831c9567d997939e (patch)
tree44b076daccdd72bd73208c57e5b1dd80adce89d5 /drivers/clk/rockchip/clk-rk3399.c
parentclk: rockchip: Ignore frac divisor for PLL equivalence when it's unused (diff)
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clk: rockchip: validity should be checked prior to cpu clock rate change
If validity is not checked prior to clock rate change, clk_set_rate( cpu_clk, unsupported_rate) will return success, but the real clock rate change operation is prohibited in post clock change event. Alough post clock change event will report error due to unsupported clock rate is set, but this error message is ignored by clock framework. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Tested-by: Rocky Hao <rocky.hao@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'drivers/clk/rockchip/clk-rk3399.c')
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