diff options
| author | Finley Xiao | 2019-04-03 11:42:26 +0200 |
|---|---|---|
| committer | Heiko Stuebner | 2019-04-12 22:34:18 +0200 |
| commit | 1f55660ff805224b4a532cfd5650753f0ed8dbeb (patch) | |
| tree | a48077c4cbab65d6e1e7c2df8308e66ff9b3400d /drivers/clk/rockchip/clk.c | |
| parent | clk: rockchip: Turn on "aclk_dmac1" for suspend on rk3288 (diff) | |
| download | kernel-qcow2-linux-1f55660ff805224b4a532cfd5650753f0ed8dbeb.tar.gz kernel-qcow2-linux-1f55660ff805224b4a532cfd5650753f0ed8dbeb.tar.xz kernel-qcow2-linux-1f55660ff805224b4a532cfd5650753f0ed8dbeb.zip | |
clk: rockchip: add a COMPOSITE_DIV_OFFSET clock-type
The div offset of some clocks are different from their mux offset
and the COMPOSITE clock-type require that div and mux offset are
the same, so add a new COMPOSITE_DIV_OFFSET clock-type to handle that.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'drivers/clk/rockchip/clk.c')
| -rw-r--r-- | drivers/clk/rockchip/clk.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/clk/rockchip/clk.c b/drivers/clk/rockchip/clk.c index c3ad92965823..0ea8e8080d1a 100644 --- a/drivers/clk/rockchip/clk.c +++ b/drivers/clk/rockchip/clk.c @@ -46,7 +46,7 @@ static struct clk *rockchip_clk_register_branch(const char *name, const char *const *parent_names, u8 num_parents, void __iomem *base, int muxdiv_offset, u8 mux_shift, u8 mux_width, u8 mux_flags, - u8 div_shift, u8 div_width, u8 div_flags, + int div_offset, u8 div_shift, u8 div_width, u8 div_flags, struct clk_div_table *div_table, int gate_offset, u8 gate_shift, u8 gate_flags, unsigned long flags, spinlock_t *lock) @@ -95,7 +95,10 @@ static struct clk *rockchip_clk_register_branch(const char *name, } div->flags = div_flags; - div->reg = base + muxdiv_offset; + if (div_offset) + div->reg = base + div_offset; + else + div->reg = base + muxdiv_offset; div->shift = div_shift; div->width = div_width; div->lock = lock; @@ -516,7 +519,7 @@ void __init rockchip_clk_register_branches( ctx->reg_base, list->muxdiv_offset, list->mux_shift, list->mux_width, list->mux_flags, - list->div_shift, list->div_width, + list->div_offset, list->div_shift, list->div_width, list->div_flags, list->div_table, list->gate_offset, list->gate_shift, list->gate_flags, flags, &ctx->lock); |