diff options
| author | Yadwinder Singh Brar | 2013-06-11 11:31:12 +0200 |
|---|---|---|
| committer | Mike Turquette | 2013-08-02 22:22:09 +0200 |
| commit | 3ff6e0d8d64d594a551b5c4904e4b617bf7eee22 (patch) | |
| tree | f0eaf7340c495e131a1b1c2e083b1af224f434af /drivers/clk/samsung/clk-exynos5250.c | |
| parent | clk: samsung: Remove unused pll registeration code for pll35xx and pll36xx (diff) | |
| download | kernel-qcow2-linux-3ff6e0d8d64d594a551b5c4904e4b617bf7eee22.tar.gz kernel-qcow2-linux-3ff6e0d8d64d594a551b5c4904e4b617bf7eee22.tar.xz kernel-qcow2-linux-3ff6e0d8d64d594a551b5c4904e4b617bf7eee22.zip | |
clk: samsung: Add support to register rate_table for samsung plls
This patch defines a common rate_table which will contain recommended p, m, s,
k values for supported rates that needs to be changed for changing
corresponding PLL's rate.
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Yadwinder Singh Brar <yadi.brar@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/samsung/clk-exynos5250.c')
| -rw-r--r-- | drivers/clk/samsung/clk-exynos5250.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c index b9a5f2a22b9a..46a16362f9c9 100644 --- a/drivers/clk/samsung/clk-exynos5250.c +++ b/drivers/clk/samsung/clk-exynos5250.c @@ -493,19 +493,19 @@ static struct samsung_gate_clock exynos5250_gate_clks[] __initdata = { struct __initdata samsung_pll_clock exynos5250_plls[nr_plls] = { [apll] = PLL_A(pll_35xx, fout_apll, "fout_apll", "fin_pll", APLL_LOCK, - APLL_CON0, "fout_apll"), + APLL_CON0, "fout_apll", NULL), [mpll] = PLL_A(pll_35xx, fout_mpll, "fout_mpll", "fin_pll", MPLL_LOCK, - MPLL_CON0, "fout_mpll"), + MPLL_CON0, "fout_mpll", NULL), [bpll] = PLL(pll_35xx, fout_bpll, "fout_bpll", "fin_pll", BPLL_LOCK, - BPLL_CON0), + BPLL_CON0, NULL), [gpll] = PLL(pll_35xx, fout_gpll, "fout_gpll", "fin_pll", GPLL_LOCK, - GPLL_CON0), + GPLL_CON0, NULL), [cpll] = PLL(pll_35xx, fout_cpll, "fout_cpll", "fin_pll", CPLL_LOCK, - CPLL_CON0), + CPLL_CON0, NULL), [epll] = PLL(pll_36xx, fout_epll, "fout_epll", "fin_pll", EPLL_LOCK, - EPLL_CON0), + EPLL_CON0, NULL), [vpll] = PLL(pll_36xx, fout_vpll, "fout_vpll", "mout_vpllsrc", - VPLL_LOCK, VPLL_CON0), + VPLL_LOCK, VPLL_CON0, NULL), }; static __initdata struct of_device_id ext_clk_match[] = { |